39 	u_char  twr;		/* write recovery time (ns)	 */  member
56 		.twr		= 10,
65 		.twr		= 8,
74 		.twr		= 9,
82 		.twr		= 10,
91 		.twr		= 16,	/* Trdl: 2 CLKs */
100 		.twr		= 8,
109 		.twr		= 8,
146 	u_int mem_khz, sd_khz, trp, twr;  in sdram_calculate_timing()  local
164 	twr = ns_to_cycles(sdram->twr, mem_khz);  in sdram_calculate_timing()
175 	sd->mdcnfg |= twr << 14;  in sdram_calculate_timing()
176 	sd->mdcnfg |= twr << 30;  in sdram_calculate_timing()
354 			" twr: %d refresh: %d cas_latency: %d\n",  in sa1110_clk_init()
356 			sdram->twr, sdram->refresh, sdram->cas_latency);  in sa1110_clk_init()