212 static inline unsigned int tegra_base_for_cpu(int cpu, bool tegra20)  in tegra_base_for_cpu()  argument
214 	if (tegra20) {  in tegra_base_for_cpu()
230 static inline unsigned int tegra_irq_idx_for_cpu(int cpu, bool tegra20)  in tegra_irq_idx_for_cpu()  argument
232 	if (tegra20)  in tegra_irq_idx_for_cpu()
239 						 bool tegra20)  in tegra_rate_for_timer()  argument
245 	if (tegra20)  in tegra_rate_for_timer()
251 static int __init tegra_init_timer(struct device_node *np, bool tegra20,  in tegra_init_timer()  argument
304 		unsigned long rate = tegra_rate_for_timer(to, tegra20);  in tegra_init_timer()
305 		unsigned int base = tegra_base_for_cpu(cpu, tegra20);  in tegra_init_timer()
306 		unsigned int idx = tegra_irq_idx_for_cpu(cpu, tegra20);  in tegra_init_timer()
389 	 * Tegra20 and Tegra30 have Cortex A9 CPU that has a TWD timer,  in tegra20_init_timer()
396 	if (of_machine_is_compatible("nvidia,tegra20") ||  in tegra20_init_timer()
404 TIMER_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
416 TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);