256 static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx)  in setup_clkevents()  argument
259 	struct clk *t2_clk = tc->clk[2];  in setup_clkevents()
260 	int irq = tc->irq[2];  in setup_clkevents()
261 	int bits = tc->tcb_config->counter_width;  in setup_clkevents()
268 	clkevt.regs = tc->regs;  in setup_clkevents()
275 		ret = clk_prepare_enable(tc->slow_clk);  in setup_clkevents()
281 		clkevt.rate = clk_get_rate(tc->slow_clk);  in setup_clkevents()
293 			clk_disable_unprepare(tc->slow_clk);  in setup_clkevents()
304 static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx)  in setup_clkevents()  argument
312 static void __init tcb_setup_dual_chan(struct atmel_tc *tc, int mck_divisor_idx)  in tcb_setup_dual_chan()  argument
341 static void __init tcb_setup_single_chan(struct atmel_tc *tc, int mck_divisor_idx)  in tcb_setup_single_chan()  argument
377 	struct atmel_tc tc;  in tcb_clksrc_init()  local
391 	tc.regs = of_iomap(node->parent, 0);  in tcb_clksrc_init()
392 	if (!tc.regs)  in tcb_clksrc_init()
399 	tc.slow_clk = of_clk_get_by_name(node->parent, "slow_clk");  in tcb_clksrc_init()
400 	if (IS_ERR(tc.slow_clk))  in tcb_clksrc_init()
401 		return PTR_ERR(tc.slow_clk);  in tcb_clksrc_init()
403 	tc.clk[0] = t0_clk;  in tcb_clksrc_init()
404 	tc.clk[1] = of_clk_get_by_name(node->parent, "t1_clk");  in tcb_clksrc_init()
405 	if (IS_ERR(tc.clk[1]))  in tcb_clksrc_init()
406 		tc.clk[1] = t0_clk;  in tcb_clksrc_init()
407 	tc.clk[2] = of_clk_get_by_name(node->parent, "t2_clk");  in tcb_clksrc_init()
408 	if (IS_ERR(tc.clk[2]))  in tcb_clksrc_init()
409 		tc.clk[2] = t0_clk;  in tcb_clksrc_init()
411 	tc.irq[2] = of_irq_get(node->parent, 2);  in tcb_clksrc_init()
412 	if (tc.irq[2] <= 0) {  in tcb_clksrc_init()
413 		tc.irq[2] = of_irq_get(node->parent, 0);  in tcb_clksrc_init()
414 		if (tc.irq[2] <= 0)  in tcb_clksrc_init()
422 	tc.tcb_config = match->data;  in tcb_clksrc_init()
423 	bits = tc.tcb_config->counter_width;  in tcb_clksrc_init()
425 	for (i = 0; i < ARRAY_SIZE(tc.irq); i++)  in tcb_clksrc_init()
426 		writel(ATMEL_TC_ALL_IRQ, tc.regs + ATMEL_TC_REG(i, IDR));  in tcb_clksrc_init()
437 	if (tc.tcb_config->has_gclk)  in tcb_clksrc_init()
456 	tcaddr = tc.regs;  in tcb_clksrc_init()
462 		tcb_setup_single_chan(&tc, best_divisor_idx);  in tcb_clksrc_init()
469 		ret = clk_prepare_enable(tc.clk[1]);  in tcb_clksrc_init()
475 		tcb_setup_dual_chan(&tc, best_divisor_idx);  in tcb_clksrc_init()
486 	ret = setup_clkevents(&tc, best_divisor_idx);  in tcb_clksrc_init()
502 		clk_disable_unprepare(tc.clk[1]);  in tcb_clksrc_init()