drivers/clocksource/dw_apb_timer_of.c

1 // SPDX-License-Identifier: GPL-2.0-only
6  * Modified from mach-picoxcell/time.c
31 	 * Reset the timer if the reset control is available, wiping  in timer_get_base_and_rate()
50 	if (!of_property_read_u32(np, "clock-freq", rate) ||  in timer_get_base_and_rate()
51 	    !of_property_read_u32(np, "clock-frequency", rate))  in timer_get_base_and_rate()
54 	timer_clk = of_clk_get_by_name(np, "timer");  in timer_get_base_and_rate()
66 		ret = -EINVAL;  in timer_get_base_and_rate()
94 		panic("No IRQ for clock event timer");  in add_clockevent()
100 	ced = dw_apb_clockevent_init(-1, event_timer->name, 300, iobase, irq,  in add_clockevent()
103 		return -EINVAL;  in add_clockevent()
124 	cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);  in add_clocksource()
126 		return -EINVAL;  in add_clocksource()
133 	 * timer is found. sched_io_base then points to the current_value  in add_clocksource()
134 	 * register of the clocksource timer.  in add_clocksource()
148 	{ .compatible = "picochip,pc3x2-rtc" },
178 static int __init dw_apb_timer_init(struct device_node *timer)  in dw_apb_timer_init()  argument
184 		pr_debug("%s: found clocksource timer\n", __func__);  in dw_apb_timer_init()
185 		ret = add_clocksource(timer);  in dw_apb_timer_init()
195 		pr_debug("%s: found clockevent timer\n", __func__);  in dw_apb_timer_init()
196 		ret = add_clockevent(timer);  in dw_apb_timer_init()
206 TIMER_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
207 TIMER_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
208 TIMER_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
209 TIMER_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);