Lines Matching +full:clk +full:- +full:out +full:- +full:frequency
1 // SPDX-License-Identifier: GPL-2.0-only
29 #include <linux/arm-smccc.h>
77 [ARCH_TIMER_PHYS_SECURE_PPI] = "sec-phys",
80 [ARCH_TIMER_HYP_PPI] = "hyp-phys",
81 [ARCH_TIMER_HYP_VIRT_PPI] = "hyp-virt",
109 * 2) a roll-over time of not less than 40 years
118 return clamp_val(ilog2(min_cycles - 1) + 1, 56, 64); in arch_counter_get_width()
127 struct clock_event_device *clk) in arch_timer_reg_write() argument
130 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write()
133 writel_relaxed((u32)val, timer->base + CNTP_CTL); in arch_timer_reg_write()
140 writeq_relaxed(val, timer->base + CNTP_CVAL_LO); in arch_timer_reg_write()
146 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write()
149 writel_relaxed((u32)val, timer->base + CNTV_CTL); in arch_timer_reg_write()
153 writeq_relaxed(val, timer->base + CNTV_CVAL_LO); in arch_timer_reg_write()
165 struct clock_event_device *clk) in arch_timer_reg_read() argument
170 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_read()
173 val = readl_relaxed(timer->base + CNTP_CTL); in arch_timer_reg_read()
179 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_read()
182 val = readl_relaxed(timer->base + CNTV_CTL); in arch_timer_reg_read()
281 _retries--; \
317 _retries--; \
318 } while (unlikely((_new - _old) >> 5) && _retries); \
382 * (7ff -> 000 -> 800) and forward (7ff -> fff -> 800), ignore register values
392 _retries--; \
422 struct clock_event_device *clk) in erratum_set_next_event_generic() argument
427 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk); in erratum_set_next_event_generic()
439 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk); in erratum_set_next_event_generic()
443 struct clock_event_device *clk) in erratum_set_next_event_virt() argument
445 erratum_set_next_event_generic(ARCH_TIMER_VIRT_ACCESS, evt, clk); in erratum_set_next_event_virt()
450 struct clock_event_device *clk) in erratum_set_next_event_phys() argument
452 erratum_set_next_event_generic(ARCH_TIMER_PHYS_ACCESS, evt, clk); in erratum_set_next_event_phys()
460 .id = "fsl,erratum-a008585",
471 .id = "hisilicon,erratum-161010101",
502 .id = "allwinner,erratum-unknown1",
529 return of_property_read_bool(np, wa->id); in arch_timer_check_dt_erratum()
536 return this_cpu_has_cap((uintptr_t)wa->id); in arch_timer_check_local_cap_erratum()
545 const struct ate_acpi_oem_info *info = wa->id; in arch_timer_check_acpi_oem_erratum()
550 if (!memcmp(info->oem_id, table->oem_id, ACPI_OEM_ID_SIZE) && in arch_timer_check_acpi_oem_erratum()
551 !memcmp(info->oem_table_id, table->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) && in arch_timer_check_acpi_oem_erratum()
552 info->oem_revision == table->oem_revision) in arch_timer_check_acpi_oem_erratum()
592 if (wa->read_cntvct_el0 || wa->read_cntpct_el0) in arch_timer_enable_workaround()
597 * out-of-line counter accessor. We may change our mind pretty in arch_timer_enable_workaround()
598 * late in the game (with a per-CPU erratum, for example), so in arch_timer_enable_workaround()
601 if (wa->read_cntvct_el0) { in arch_timer_enable_workaround()
604 } else if (wa->disable_compat_vdso && vdso_default != VDSO_CLOCKMODE_NONE) { in arch_timer_enable_workaround()
640 wa->desc, __wa->desc); in arch_timer_check_ool_workaround()
647 local ? "local" : "global", wa->desc); in arch_timer_check_ool_workaround()
674 evt->event_handler(evt); in timer_handler()
710 struct clock_event_device *clk) in arch_timer_shutdown() argument
714 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk); in arch_timer_shutdown()
716 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk); in arch_timer_shutdown()
721 static int arch_timer_shutdown_virt(struct clock_event_device *clk) in arch_timer_shutdown_virt() argument
723 return arch_timer_shutdown(ARCH_TIMER_VIRT_ACCESS, clk); in arch_timer_shutdown_virt()
726 static int arch_timer_shutdown_phys(struct clock_event_device *clk) in arch_timer_shutdown_phys() argument
728 return arch_timer_shutdown(ARCH_TIMER_PHYS_ACCESS, clk); in arch_timer_shutdown_phys()
731 static int arch_timer_shutdown_virt_mem(struct clock_event_device *clk) in arch_timer_shutdown_virt_mem() argument
733 return arch_timer_shutdown(ARCH_TIMER_MEM_VIRT_ACCESS, clk); in arch_timer_shutdown_virt_mem()
736 static int arch_timer_shutdown_phys_mem(struct clock_event_device *clk) in arch_timer_shutdown_phys_mem() argument
738 return arch_timer_shutdown(ARCH_TIMER_MEM_PHYS_ACCESS, clk); in arch_timer_shutdown_phys_mem()
742 struct clock_event_device *clk) in set_next_event() argument
747 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk); in set_next_event()
756 arch_timer_reg_write(access, ARCH_TIMER_REG_CVAL, evt + cnt, clk); in set_next_event()
757 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk); in set_next_event()
761 struct clock_event_device *clk) in arch_timer_set_next_event_virt() argument
763 set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk); in arch_timer_set_next_event_virt()
768 struct clock_event_device *clk) in arch_timer_set_next_event_phys() argument
770 set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk); in arch_timer_set_next_event_phys()
779 cnt_hi = __le32_to_cpu((__le32 __force)__raw_readl(t->base + offset_lo + 4)); in arch_counter_get_cnt_mem()
780 cnt_lo = __le32_to_cpu((__le32 __force)__raw_readl(t->base + offset_lo)); in arch_counter_get_cnt_mem()
781 tmp_hi = __le32_to_cpu((__le32 __force)__raw_readl(t->base + offset_lo + 4)); in arch_counter_get_cnt_mem()
788 struct clock_event_device *clk) in set_next_event_mem() argument
790 struct arch_timer *timer = to_arch_timer(clk); in set_next_event_mem()
794 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk); in set_next_event_mem()
799 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk); in set_next_event_mem()
810 arch_timer_reg_write(access, ARCH_TIMER_REG_CVAL, evt + cnt, clk); in set_next_event_mem()
811 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk); in set_next_event_mem()
815 struct clock_event_device *clk) in arch_timer_set_next_event_virt_mem() argument
817 set_next_event_mem(ARCH_TIMER_MEM_VIRT_ACCESS, evt, clk); in arch_timer_set_next_event_virt_mem()
822 struct clock_event_device *clk) in arch_timer_set_next_event_phys_mem() argument
824 set_next_event_mem(ARCH_TIMER_MEM_PHYS_ACCESS, evt, clk); in arch_timer_set_next_event_phys_mem()
833 * XGene-1 implements CVAL in terms of TVAL, meaning in __arch_timer_check_delta()
854 struct clock_event_device *clk) in __arch_timer_setup() argument
858 clk->features = CLOCK_EVT_FEAT_ONESHOT; in __arch_timer_setup()
861 typeof(clk->set_next_event) sne; in __arch_timer_setup()
866 clk->features |= CLOCK_EVT_FEAT_C3STOP; in __arch_timer_setup()
867 clk->name = "arch_sys_timer"; in __arch_timer_setup()
868 clk->rating = 450; in __arch_timer_setup()
869 clk->cpumask = cpumask_of(smp_processor_id()); in __arch_timer_setup()
870 clk->irq = arch_timer_ppi[arch_timer_uses_ppi]; in __arch_timer_setup()
873 clk->set_state_shutdown = arch_timer_shutdown_virt; in __arch_timer_setup()
874 clk->set_state_oneshot_stopped = arch_timer_shutdown_virt; in __arch_timer_setup()
880 clk->set_state_shutdown = arch_timer_shutdown_phys; in __arch_timer_setup()
881 clk->set_state_oneshot_stopped = arch_timer_shutdown_phys; in __arch_timer_setup()
888 clk->set_next_event = sne; in __arch_timer_setup()
891 clk->features |= CLOCK_EVT_FEAT_DYNIRQ; in __arch_timer_setup()
892 clk->name = "arch_mem_timer"; in __arch_timer_setup()
893 clk->rating = 400; in __arch_timer_setup()
894 clk->cpumask = cpu_possible_mask; in __arch_timer_setup()
896 clk->set_state_shutdown = arch_timer_shutdown_virt_mem; in __arch_timer_setup()
897 clk->set_state_oneshot_stopped = arch_timer_shutdown_virt_mem; in __arch_timer_setup()
898 clk->set_next_event = in __arch_timer_setup()
901 clk->set_state_shutdown = arch_timer_shutdown_phys_mem; in __arch_timer_setup()
902 clk->set_state_oneshot_stopped = arch_timer_shutdown_phys_mem; in __arch_timer_setup()
903 clk->set_next_event = in __arch_timer_setup()
910 clk->set_state_shutdown(clk); in __arch_timer_setup()
912 clockevents_config_and_register(clk, arch_timer_rate, 0xf, max_delta); in __arch_timer_setup()
923 divider -= 8; in arch_timer_evtstrm_enable()
942 * As the event stream can at most be generated at half the frequency in arch_timer_configure_evtstream()
943 * of the counter, use half the frequency when computing the divider. in arch_timer_configure_evtstream()
951 lsb = fls(evt_stream_div) - 1; in arch_timer_configure_evtstream()
952 if (lsb > 0 && (evt_stream_div & BIT(lsb - 1))) in arch_timer_configure_evtstream()
1029 struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt); in arch_timer_starting_cpu() local
1032 __arch_timer_setup(ARCH_TIMER_TYPE_CP15, clk); in arch_timer_starting_cpu()
1051 return -EINVAL; in validate_timer_rate()
1053 /* Arch timer frequency < 1MHz can cause trouble */ in validate_timer_rate()
1060 * For historical reasons, when probing with DT we use whichever (non-zero)
1062 * probed has a clock-frequency property, this overrides the HW register.
1070 if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) in arch_timer_of_configure_rate()
1073 /* Check the timer frequency. */ in arch_timer_of_configure_rate()
1075 pr_warn("frequency not available\n"); in arch_timer_of_configure_rate()
1175 static void arch_timer_stop(struct clock_event_device *clk) in arch_timer_stop() argument
1177 pr_debug("disable IRQ%d cpu #%d\n", clk->irq, smp_processor_id()); in arch_timer_stop()
1183 clk->set_state_shutdown(clk); in arch_timer_stop()
1188 struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt); in arch_timer_dying_cpu() local
1190 arch_timer_stop(clk); in arch_timer_dying_cpu()
1244 err = -ENOMEM; in arch_timer_register()
1245 goto out; in arch_timer_register()
1304 out: in arch_timer_register()
1315 return -ENOMEM; in arch_timer_mem_register()
1317 arch_timer_mem->base = base; in arch_timer_mem_register()
1318 arch_timer_mem->evt.irq = irq; in arch_timer_mem_register()
1319 __arch_timer_setup(ARCH_TIMER_TYPE_MEM, &arch_timer_mem->evt); in arch_timer_mem_register()
1326 ret = request_irq(irq, func, IRQF_TIMER, "arch_mem_timer", &arch_timer_mem->evt); in arch_timer_mem_register()
1337 { .compatible = "arm,armv7-timer", },
1338 { .compatible = "arm,armv8-timer", },
1343 { .compatible = "arm,armv7-timer-mem", },
1353 /* We have two timers, and both device-tree nodes are probed. */ in arch_timer_needs_of_probing()
1359 * check if we have another type of timer node in device-tree. in arch_timer_needs_of_probing()
1382 * arch_timer_select_ppi() - Select suitable PPI for the current system.
1433 has_names = of_property_read_bool(np, "interrupt-names"); in arch_timer_of_init()
1449 arch_timer_c3stop = !of_property_read_bool(np, "always-on"); in arch_timer_of_init()
1459 of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) in arch_timer_of_init()
1466 return -EINVAL; in arch_timer_of_init()
1471 "arm,no-tick-in-suspend"); in arch_timer_of_init()
1482 TIMER_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
1483 TIMER_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
1491 base = ioremap(frame->cntbase, frame->size); in arch_timer_mem_frame_get_cntfrq()
1493 pr_err("Unable to map frame @ %pa\n", &frame->cntbase); in arch_timer_mem_frame_get_cntfrq()
1512 cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size); in arch_timer_mem_find_best_frame()
1515 &timer_mem->cntctlbase); in arch_timer_mem_find_best_frame()
1529 frame = &timer_mem->frame[i]; in arch_timer_mem_find_best_frame()
1530 if (!frame->valid) in arch_timer_mem_find_best_frame()
1562 irq = frame->virt_irq; in arch_timer_mem_frame_register()
1564 irq = frame->phys_irq; in arch_timer_mem_frame_register()
1569 return -EINVAL; in arch_timer_mem_frame_register()
1572 if (!request_mem_region(frame->cntbase, frame->size, in arch_timer_mem_frame_register()
1574 return -EBUSY; in arch_timer_mem_frame_register()
1576 base = ioremap(frame->cntbase, frame->size); in arch_timer_mem_frame_register()
1579 return -ENXIO; in arch_timer_mem_frame_register()
1598 int ret = -EINVAL; in arch_timer_mem_of_init()
1603 return -ENOMEM; in arch_timer_mem_of_init()
1606 goto out; in arch_timer_mem_of_init()
1607 timer_mem->cntctlbase = res.start; in arch_timer_mem_of_init()
1608 timer_mem->size = resource_size(&res); in arch_timer_mem_of_init()
1614 if (of_property_read_u32(frame_node, "frame-number", &n)) { in arch_timer_mem_of_init()
1615 pr_err(FW_BUG "Missing frame-number.\n"); in arch_timer_mem_of_init()
1616 goto out; in arch_timer_mem_of_init()
1619 pr_err(FW_BUG "Wrong frame-number, only 0-%u are permitted.\n", in arch_timer_mem_of_init()
1620 ARCH_TIMER_MEM_MAX_FRAMES - 1); in arch_timer_mem_of_init()
1621 goto out; in arch_timer_mem_of_init()
1623 frame = &timer_mem->frame[n]; in arch_timer_mem_of_init()
1625 if (frame->valid) { in arch_timer_mem_of_init()
1626 pr_err(FW_BUG "Duplicated frame-number.\n"); in arch_timer_mem_of_init()
1627 goto out; in arch_timer_mem_of_init()
1631 goto out; in arch_timer_mem_of_init()
1633 frame->cntbase = res.start; in arch_timer_mem_of_init()
1634 frame->size = resource_size(&res); in arch_timer_mem_of_init()
1636 frame->virt_irq = irq_of_parse_and_map(frame_node, in arch_timer_mem_of_init()
1638 frame->phys_irq = irq_of_parse_and_map(frame_node, in arch_timer_mem_of_init()
1641 frame->valid = true; in arch_timer_mem_of_init()
1647 &timer_mem->cntctlbase); in arch_timer_mem_of_init()
1648 ret = -EINVAL; in arch_timer_mem_of_init()
1649 goto out; in arch_timer_mem_of_init()
1658 out: in arch_timer_mem_of_init()
1662 TIMER_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
1674 frame = &timer_mem->frame[i]; in arch_timer_mem_verify_cntfrq()
1676 if (!frame->valid) in arch_timer_mem_verify_cntfrq()
1684 &frame->cntbase, in arch_timer_mem_verify_cntfrq()
1687 return -EINVAL; in arch_timer_mem_verify_cntfrq()
1702 return -ENOMEM; in arch_timer_mem_acpi_init()
1706 goto out; in arch_timer_mem_acpi_init()
1722 goto out; in arch_timer_mem_acpi_init()
1731 &timer->cntctlbase); in arch_timer_mem_acpi_init()
1736 out: in arch_timer_mem_acpi_init()
1741 /* Initialize per-processor generic timer and memory-mapped timer(if present) */
1748 return -EINVAL; in arch_timer_acpi_init()
1775 pr_err(FW_BUG "frequency not available.\n"); in arch_timer_acpi_init()
1782 return -EINVAL; in arch_timer_acpi_init()
1785 /* Always-on capability */ in arch_timer_acpi_init()
1797 pr_err("Failed to initialize memory-mapped timer.\n"); in arch_timer_acpi_init()
1812 return -EOPNOTSUPP; in kvm_arch_ptp_get_crosststamp()
1823 return -EOPNOTSUPP; in kvm_arch_ptp_get_crosststamp()