1 // SPDX-License-Identifier: GPL-2.0
3  * Zynq UltraScale+ MPSoC clock controller
5  *  Copyright (C) 2016-2019 Xilinx
12 #include <linux/clk-provider.h>
19 #include "clk-zynqmp.h"
49  * struct clock_parent - Clock parent
50  * @name:	Parent name
51  * @id:		Parent clock ID
55 	char name[MAX_NAME_LEN];  member
61  * struct zynqmp_clock - Clock
62  * @clk_name:		Clock name
63  * @valid:		Validity flag of clock
64  * @type:		Clock type (Output/External)
65  * @node:		Clock topology nodes
67  * @parent:		Parent of clock
68  * @num_parents:	Number of parents of clock
69  * @clk_id:		Clock id
83 	char name[CLK_GET_NAME_RESP_LEN];  member
122 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
136 static struct zynqmp_clock *clock;  variable
141  * zynqmp_is_valid_clock() - Check whether clock is valid or not
142  * @clk_id:	Clock index
144  * Return: 1 if clock is valid, 0 if clock is invalid else error code
149 		return -ENODEV;  in zynqmp_is_valid_clock()
151 	return clock[clk_id].valid;  in zynqmp_is_valid_clock()
155  * zynqmp_get_clock_name() - Get name of clock from Clock index
156  * @clk_id:	Clock index
157  * @clk_name:	Name of clock
167 		strscpy(clk_name, clock[clk_id].clk_name, MAX_NAME_LEN);  in zynqmp_get_clock_name()
171 	return ret == 0 ? -EINVAL : ret;  in zynqmp_get_clock_name()
175  * zynqmp_get_clock_type() - Get type of clock
176  * @clk_id:	Clock index
177  * @type:	Clock type: CLK_TYPE_OUTPUT or CLK_TYPE_EXTERNAL
187 		*type = clock[clk_id].type;  in zynqmp_get_clock_type()
191 	return ret == 0 ? -EINVAL : ret;  in zynqmp_get_clock_type()
195  * zynqmp_pm_clock_get_num_clocks() - Get number of clocks in system
217  * zynqmp_pm_clock_get_name() - Get the name of clock for given id
218  * @clock_id:	ID of the clock to be queried
219  * @response:	Name of the clock with the given id
221  * This function is used to get name of clock specified by given
222  * clock ID.
246  * zynqmp_pm_clock_get_topology() - Get the topology of clock for given id
247  * @clock_id:	ID of the clock to be queried
248  * @index:	Node index of clock topology
251  * This function is used to get topology information for the clock
252  * specified by given clock ID.
300  * zynqmp_clk_register_fixed_factor() - Register fixed factor with the
301  *					clock framework
302  * @name:		Name of this clock
303  * @clk_id:		Clock ID
304  * @parents:		Name of this clock's parents
306  * @nodes:		Clock topology node
308  * Return: clock hardware to the registered clock
310 struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id,  in zynqmp_clk_register_fixed_factor()  argument
332 	flag = zynqmp_clk_map_common_ccf_flags(nodes->flag);  in zynqmp_clk_register_fixed_factor()
334 	hw = clk_hw_register_fixed_factor(NULL, name,  in zynqmp_clk_register_fixed_factor()
343  * zynqmp_pm_clock_get_parents() - Get the first 3 parents of clock for given id
344  * @clock_id:	Clock ID
346  * @response:	Parents of the given clock
348  * This function is used to get 3 parents for the clock specified by
349  * given clock ID.
377  * zynqmp_pm_clock_get_attributes() - Get the attributes of clock for given id
378  * @clock_id:	Clock ID
379  * @response:	Clock attributes response
381  * This function is used to get clock's attributes(e.g. valid, clock type, etc).
402  * __zynqmp_clock_get_topology() - Get topology data of clock from firmware
404  * @topology:		Clock topology
405  * @response:		Clock topology data received from firmware
417 	for (i = 0; i < ARRAY_SIZE(response->topology); i++) {  in __zynqmp_clock_get_topology()
418 		type = FIELD_GET(CLK_TOPOLOGY_TYPE, response->topology[i]);  in __zynqmp_clock_get_topology()
423 						   response->topology[i]);  in __zynqmp_clock_get_topology()
426 					  response->topology[i]);  in __zynqmp_clock_get_topology()
429 				  response->topology[i]);  in __zynqmp_clock_get_topology()
437  * zynqmp_clock_get_topology() - Get topology of clock from firmware using
439  * @clk_id:		Clock index
440  * @topology:		Clock topology
454 		ret = zynqmp_pm_clock_get_topology(clock[clk_id].clk_id, j,  in zynqmp_clock_get_topology()
468  * __zynqmp_clock_get_parents() - Get parents info of clock from firmware
470  * @parents:		Clock parents
471  * @response:		Clock parents data received from firmware
483 	for (i = 0; i < ARRAY_SIZE(response->parents); i++) {  in __zynqmp_clock_get_parents()
484 		if (response->parents[i] == NA_PARENT)  in __zynqmp_clock_get_parents()
488 		parent->id = FIELD_GET(CLK_PARENTS_ID, response->parents[i]);  in __zynqmp_clock_get_parents()
489 		if (response->parents[i] == DUMMY_PARENT) {  in __zynqmp_clock_get_parents()
490 			strcpy(parent->name, "dummy_name");  in __zynqmp_clock_get_parents()
491 			parent->flag = 0;  in __zynqmp_clock_get_parents()
493 			parent->flag = FIELD_GET(CLK_PARENTS_FLAGS,  in __zynqmp_clock_get_parents()
494 						 response->parents[i]);  in __zynqmp_clock_get_parents()
495 			if (zynqmp_get_clock_name(parent->id, parent->name))  in __zynqmp_clock_get_parents()
505  * zynqmp_clock_get_parents() - Get parents info from firmware using PM_API
506  * @clk_id:		Clock index
507  * @parents:		Clock parents
521 		ret = zynqmp_pm_clock_get_parents(clock[clk_id].clk_id, j,  in zynqmp_clock_get_parents()
537  * zynqmp_get_parent_list() - Create list of parents name
539  * @clk_id:		Clock index
540  * @parent_list:	List of parent's name
549 	u32 total_parents = clock[clk_id].num_parents;  in zynqmp_get_parent_list()
553 	clk_nodes = clock[clk_id].node;  in zynqmp_get_parent_list()
554 	parents = clock[clk_id].parent;  in zynqmp_get_parent_list()
558 			parent_list[i] = parents[i].name;  in zynqmp_get_parent_list()
560 			ret = of_property_match_string(np, "clock-names",  in zynqmp_get_parent_list()
561 						       parents[i].name);  in zynqmp_get_parent_list()
563 				strcpy(parents[i].name, "dummy_name");  in zynqmp_get_parent_list()
564 			parent_list[i] = parents[i].name;  in zynqmp_get_parent_list()
566 			strcat(parents[i].name,  in zynqmp_get_parent_list()
567 			       clk_type_postfix[clk_nodes[parents[i].flag - 1].  in zynqmp_get_parent_list()
569 			parent_list[i] = parents[i].name;  in zynqmp_get_parent_list()
578  * zynqmp_register_clk_topology() - Register clock topology
579  * @clk_id:		Clock index
580  * @clk_name:		Clock Name
582  * @parent_names:	List of parents name
584  * Return: Returns either clock hardware or error+reason
596 	nodes = clock[clk_id].node;  in zynqmp_register_clk_topology()
597 	num_nodes = clock[clk_id].num_nodes;  in zynqmp_register_clk_topology()
598 	clk_dev_id = clock[clk_id].clk_id;  in zynqmp_register_clk_topology()
602 		 * Clock name received from firmware is output clock name.  in zynqmp_register_clk_topology()
603 		 * Intermediate clock names are postfixed with type of clock.  in zynqmp_register_clk_topology()
605 		if (j != (num_nodes - 1)) {  in zynqmp_register_clk_topology()
634  * zynqmp_register_clocks() - Register clocks
648 		/* get clock name, continue to next clock if name not found */  in zynqmp_register_clocks()
652 		/* Check if clock is valid and output clock.  in zynqmp_register_clocks()
653 		 * Do not register invalid or external clock.  in zynqmp_register_clocks()
659 		/* Get parents of clock*/  in zynqmp_register_clocks()
663 				  clock[i].clk_name);  in zynqmp_register_clocks()
667 		zynqmp_data->hws[i] =  in zynqmp_register_clocks()
674 		if (IS_ERR(zynqmp_data->hws[i])) {  in zynqmp_register_clocks()
676 			       clock[i].clk_name, PTR_ERR(zynqmp_data->hws[i]));  in zynqmp_register_clocks()
684  * zynqmp_get_clock_info() - Get clock information from firmware using PM_API
692 	struct name_resp name;  in zynqmp_get_clock_info()  local
699 		clock[i].valid = FIELD_GET(CLK_ATTR_VALID, attr.attr[0]);  in zynqmp_get_clock_info()
700 		/* skip query for Invalid clock */  in zynqmp_get_clock_info()
705 		clock[i].type = FIELD_GET(CLK_ATTR_TYPE, attr.attr[0]) ?  in zynqmp_get_clock_info()
712 		clock[i].clk_id = FIELD_PREP(CLK_ATTR_NODE_CLASS, class) |  in zynqmp_get_clock_info()
717 		zynqmp_pm_clock_get_name(clock[i].clk_id, &name);  in zynqmp_get_clock_info()
720 		 * Terminate with NULL character in case name provided by firmware  in zynqmp_get_clock_info()
723 		name.name[sizeof(name.name) - 1] = '\0';  in zynqmp_get_clock_info()
725 		if (!strcmp(name.name, RESERVED_CLK_NAME))  in zynqmp_get_clock_info()
727 		strscpy(clock[i].clk_name, name.name, MAX_NAME_LEN);  in zynqmp_get_clock_info()
730 	/* Get topology of all clock */  in zynqmp_get_clock_info()
736 		ret = zynqmp_clock_get_topology(i, clock[i].node,  in zynqmp_get_clock_info()
737 						&clock[i].num_nodes);  in zynqmp_get_clock_info()
741 		ret = zynqmp_clock_get_parents(i, clock[i].parent,  in zynqmp_get_clock_info()
742 					       &clock[i].num_parents);  in zynqmp_get_clock_info()
749  * zynqmp_clk_setup() - Setup the clock framework and register clocks
765 		return -ENOMEM;  in zynqmp_clk_setup()
767 	clock = kcalloc(clock_max_idx, sizeof(*clock), GFP_KERNEL);  in zynqmp_clk_setup()
768 	if (!clock) {  in zynqmp_clk_setup()
770 		return -ENOMEM;  in zynqmp_clk_setup()
776 	zynqmp_data->num = clock_max_idx;  in zynqmp_clk_setup()
783 	struct device *dev = &pdev->dev;  in zynqmp_clock_probe()
785 	ret = zynqmp_clk_setup(dev->of_node);  in zynqmp_clock_probe()
791 	{.compatible = "xlnx,zynqmp-clk"},
792 	{.compatible = "xlnx,versal-clk"},
799 		.name = "zynqmp_clock",