1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/clk-provider.h>
13 #include "clk-uniphier.h"
19 	switch (data->type) {  in uniphier_clk_register()
21 		return uniphier_clk_register_cpugear(dev, regmap, data->name,  in uniphier_clk_register()
22 						     &data->data.cpugear);  in uniphier_clk_register()
24 		return uniphier_clk_register_fixed_factor(dev, data->name,  in uniphier_clk_register()
25 							  &data->data.factor);  in uniphier_clk_register()
27 		return uniphier_clk_register_fixed_rate(dev, data->name,  in uniphier_clk_register()
28 							&data->data.rate);  in uniphier_clk_register()
30 		return uniphier_clk_register_gate(dev, regmap, data->name,  in uniphier_clk_register()
31 						  &data->data.gate);  in uniphier_clk_register()
33 		return uniphier_clk_register_mux(dev, regmap, data->name,  in uniphier_clk_register()
34 						 &data->data.mux);  in uniphier_clk_register()
36 		dev_err(dev, "unsupported clock type\n");  in uniphier_clk_register()
37 		return ERR_PTR(-EINVAL);  in uniphier_clk_register()
43 	struct device *dev = &pdev->dev;  in uniphier_clk_probe()
52 		return -EINVAL;  in uniphier_clk_probe()
54 	parent = of_get_parent(dev->of_node); /* parent should be syscon node */  in uniphier_clk_probe()
63 	for (p = data; p->name; p++)  in uniphier_clk_probe()
64 		clk_num = max(clk_num, p->idx + 1);  in uniphier_clk_probe()
69 		return -ENOMEM;  in uniphier_clk_probe()
71 	hw_data->num = clk_num;  in uniphier_clk_probe()
74 	while (--clk_num >= 0)  in uniphier_clk_probe()
75 		hw_data->hws[clk_num] = ERR_PTR(-EINVAL);  in uniphier_clk_probe()
77 	for (p = data; p->name; p++) {  in uniphier_clk_probe()
80 		dev_dbg(dev, "register %s (index=%d)\n", p->name, p->idx);  in uniphier_clk_probe()
82 		if (WARN(IS_ERR(hw), "failed to register %s", p->name))  in uniphier_clk_probe()
85 		if (p->idx >= 0)  in uniphier_clk_probe()
86 			hw_data->hws[p->idx] = hw;  in uniphier_clk_probe()
94 	/* System clock */
96 		.compatible = "socionext,uniphier-ld4-clock",
100 		.compatible = "socionext,uniphier-pro4-clock",
104 		.compatible = "socionext,uniphier-sld8-clock",
108 		.compatible = "socionext,uniphier-pro5-clock",
112 		.compatible = "socionext,uniphier-pxs2-clock",
116 		.compatible = "socionext,uniphier-ld11-clock",
120 		.compatible = "socionext,uniphier-ld20-clock",
124 		.compatible = "socionext,uniphier-pxs3-clock",
128 		.compatible = "socionext,uniphier-nx1-clock",
131 	/* Media I/O clock, SD clock */
133 		.compatible = "socionext,uniphier-ld4-mio-clock",
137 		.compatible = "socionext,uniphier-pro4-mio-clock",
141 		.compatible = "socionext,uniphier-sld8-mio-clock",
145 		.compatible = "socionext,uniphier-pro5-sd-clock",
149 		.compatible = "socionext,uniphier-pxs2-sd-clock",
153 		.compatible = "socionext,uniphier-ld11-mio-clock",
157 		.compatible = "socionext,uniphier-ld20-sd-clock",
161 		.compatible = "socionext,uniphier-pxs3-sd-clock",
165 		.compatible = "socionext,uniphier-nx1-sd-clock",
168 	/* Peripheral clock */
170 		.compatible = "socionext,uniphier-ld4-peri-clock",
174 		.compatible = "socionext,uniphier-pro4-peri-clock",
178 		.compatible = "socionext,uniphier-sld8-peri-clock",
182 		.compatible = "socionext,uniphier-pro5-peri-clock",
186 		.compatible = "socionext,uniphier-pxs2-peri-clock",
190 		.compatible = "socionext,uniphier-ld11-peri-clock",
194 		.compatible = "socionext,uniphier-ld20-peri-clock",
198 		.compatible = "socionext,uniphier-pxs3-peri-clock",
202 		.compatible = "socionext,uniphier-nx1-peri-clock",
205 	/* SoC-glue clock */
207 		.compatible = "socionext,uniphier-pro4-sg-clock",
216 		.name = "uniphier-clk",