Lines Matching refs:clk_base
860 static void __init periph_clk_init(void __iomem *clk_base, in periph_clk_init() argument
882 clk = tegra_clk_register_periph_data(clk_base, data); in periph_clk_init()
887 static void __init gate_clk_init(void __iomem *clk_base, in gate_clk_init() argument
905 clk_base, data->flags, in gate_clk_init()
912 static void __init div_clk_init(void __iomem *clk_base, in div_clk_init() argument
929 data->p.parent_name, clk_base + data->offset, in div_clk_init()
939 static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base, in init_pllp() argument
950 clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, in init_pllp()
966 clk_base + data->offset, 0, data->div_flags, in init_pllp()
969 data->div_name, clk_base + data->offset, in init_pllp()
987 "pll_p_out_cpu", clk_base + PLLP_OUTB, 0, 0, 24, in init_pllp()
993 "pll_p_out4_div", clk_base + PLLP_OUTB, in init_pllp()
1006 clk_base + PLLP_MISC1, 29, 0, NULL); in init_pllp()
1015 CLK_IGNORE_UNUSED, clk_base + PLLP_MISC1, 28, 0, in init_pllp()
1022 void __init tegra_periph_clk_init(void __iomem *clk_base, in tegra_periph_clk_init() argument
1026 init_pllp(clk_base, pmc_base, tegra_clks, pll_params); in tegra_periph_clk_init()
1027 periph_clk_init(clk_base, tegra_clks); in tegra_periph_clk_init()
1028 gate_clk_init(clk_base, tegra_clks); in tegra_periph_clk_init()
1029 div_clk_init(clk_base, tegra_clks); in tegra_periph_clk_init()