1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
15 #define pll_out_enb(p) (BIT(p->enb_bit_idx))
16 #define pll_out_rst(p) (BIT(p->rst_bit_idx))
21 	u32 val = readl_relaxed(pll_out->reg);  in clk_pll_out_is_enabled()
36 	if (pll_out->lock)  in clk_pll_out_enable()
37 		spin_lock_irqsave(pll_out->lock, flags);  in clk_pll_out_enable()
39 	val = readl_relaxed(pll_out->reg);  in clk_pll_out_enable()
43 	writel_relaxed(val, pll_out->reg);  in clk_pll_out_enable()
46 	if (pll_out->lock)  in clk_pll_out_enable()
47 		spin_unlock_irqrestore(pll_out->lock, flags);  in clk_pll_out_enable()
58 	if (pll_out->lock)  in clk_pll_out_disable()
59 		spin_lock_irqsave(pll_out->lock, flags);  in clk_pll_out_disable()
61 	val = readl_relaxed(pll_out->reg);  in clk_pll_out_disable()
65 	writel_relaxed(val, pll_out->reg);  in clk_pll_out_disable()
68 	if (pll_out->lock)  in clk_pll_out_disable()
69 		spin_unlock_irqrestore(pll_out->lock, flags);  in clk_pll_out_disable()
74 	if (!__clk_get_enable_count(hw->clk))  in tegra_clk_pll_out_restore_context()
88 		const char *parent_name, void __iomem *reg, u8 enb_bit_idx,  in tegra_clk_register_pll_out()  argument
94 	struct clk_init_data init;  in tegra_clk_register_pll_out()  local
98 		return ERR_PTR(-ENOMEM);  in tegra_clk_register_pll_out()
100 	init.name = name;  in tegra_clk_register_pll_out()
101 	init.ops = &tegra_clk_pll_out_ops;  in tegra_clk_register_pll_out()
102 	init.parent_names = (parent_name ? &parent_name : NULL);  in tegra_clk_register_pll_out()
103 	init.num_parents = (parent_name ? 1 : 0);  in tegra_clk_register_pll_out()
104 	init.flags = flags;  in tegra_clk_register_pll_out()
106 	pll_out->reg = reg;  in tegra_clk_register_pll_out()
107 	pll_out->enb_bit_idx = enb_bit_idx;  in tegra_clk_register_pll_out()
108 	pll_out->rst_bit_idx = rst_bit_idx;  in tegra_clk_register_pll_out()
109 	pll_out->flags = pll_out_flags;  in tegra_clk_register_pll_out()
110 	pll_out->lock = lock;  in tegra_clk_register_pll_out()
112 	/* Data in .init is copied by clk_register(), so stack variable OK */  in tegra_clk_register_pll_out()
113 	pll_out->hw.init = &init;  in tegra_clk_register_pll_out()
115 	clk = clk_register(NULL, &pll_out->hw);  in tegra_clk_register_pll_out()