1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Maxime Ripard <maxime.ripard@free-electrons.com>
8 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
53 	spin_lock_irqsave(data->lock, flags);  in sun4i_a10_display_assert()
55 	reg = readl(data->reg);  in sun4i_a10_display_assert()
56 	writel(reg & ~BIT(data->offset + id), data->reg);  in sun4i_a10_display_assert()
58 	spin_unlock_irqrestore(data->lock, flags);  in sun4i_a10_display_assert()
70 	spin_lock_irqsave(data->lock, flags);  in sun4i_a10_display_deassert()
72 	reg = readl(data->reg);  in sun4i_a10_display_deassert()
73 	writel(reg | BIT(data->offset + id), data->reg);  in sun4i_a10_display_deassert()
75 	spin_unlock_irqrestore(data->lock, flags);  in sun4i_a10_display_deassert()
85 	return !(readl(data->reg) & BIT(data->offset + id));  in sun4i_a10_display_status()
105 	const char *clk_name = node->name;  in sun4i_a10_display_init()
115 	of_property_read_string(node, "clock-output-names", &clk_name);  in sun4i_a10_display_init()
123 	ret = of_clk_parent_fill(node, parents, data->parents);  in sun4i_a10_display_init()
124 	if (ret != data->parents) {  in sun4i_a10_display_init()
133 	mux->reg = reg;  in sun4i_a10_display_init()
134 	mux->shift = data->offset_mux;  in sun4i_a10_display_init()
135 	mux->mask = (1 << data->width_mux) - 1;  in sun4i_a10_display_init()
136 	mux->lock = &sun4i_a10_display_lock;  in sun4i_a10_display_init()
142 	gate->reg = reg;  in sun4i_a10_display_init()
143 	gate->bit_idx = data->offset_en;  in sun4i_a10_display_init()
144 	gate->lock = &sun4i_a10_display_lock;  in sun4i_a10_display_init()
146 	if (data->has_div) {  in sun4i_a10_display_init()
151 		div->reg = reg;  in sun4i_a10_display_init()
152 		div->shift = data->offset_div;  in sun4i_a10_display_init()
153 		div->width = data->width_div;  in sun4i_a10_display_init()
154 		div->lock = &sun4i_a10_display_lock;  in sun4i_a10_display_init()
158 				     parents, data->parents,  in sun4i_a10_display_init()
159 				     &mux->hw, &clk_mux_ops,  in sun4i_a10_display_init()
160 				     data->has_div ? &div->hw : NULL,  in sun4i_a10_display_init()
161 				     data->has_div ? &clk_divider_ops : NULL,  in sun4i_a10_display_init()
162 				     &gate->hw, &clk_gate_ops,  in sun4i_a10_display_init()
163 				     data->flags);  in sun4i_a10_display_init()
175 	if (!data->num_rst)  in sun4i_a10_display_init()
182 	reset_data->reg = reg;  in sun4i_a10_display_init()
183 	reset_data->offset = data->offset_rst;  in sun4i_a10_display_init()
184 	reset_data->lock = &sun4i_a10_display_lock;  in sun4i_a10_display_init()
185 	reset_data->rcdev.nr_resets = data->num_rst;  in sun4i_a10_display_init()
186 	reset_data->rcdev.ops = &sun4i_a10_display_reset_ops;  in sun4i_a10_display_init()
187 	reset_data->rcdev.of_node = node;  in sun4i_a10_display_init()
189 	if (data->num_rst == 1) {  in sun4i_a10_display_init()
190 		reset_data->rcdev.of_reset_n_cells = 0;  in sun4i_a10_display_init()
191 		reset_data->rcdev.of_xlate = &sun4i_a10_display_reset_xlate;  in sun4i_a10_display_init()
193 		reset_data->rcdev.of_reset_n_cells = 1;  in sun4i_a10_display_init()
196 	if (reset_controller_register(&reset_data->rcdev)) {  in sun4i_a10_display_init()
236 CLK_OF_DECLARE(sun4i_a10_tcon_ch0, "allwinner,sun4i-a10-tcon-ch0-clk",
255 CLK_OF_DECLARE(sun4i_a10_display, "allwinner,sun4i-a10-display-clk",