1 // SPDX-License-Identifier: GPL-2.0-only
5  * Adjustable factor-based clock implementation
8 #include <linux/clk-provider.h>
9 #include <linux/delay.h>
16 #include "clk-factors.h"
19  * DOC: basic adjustable factor-based clock
22  * prepare - clk_prepare only ensures that parents are prepared
23  * enable - clk_enable only ensures that parents are enabled
24  * rate - rate is adjustable.
25  *        clk->rate = (parent->rate * N * (K + 1) >> P) / (M + 1)
26  * parent - fixed parent.  No clk_set_parent support
33 #define SETMASK(len, pos)		(((1U << (len)) - 1) << (pos))
47 	const struct clk_factors_config *config = factors->config;  in clk_factors_recalc_rate()  local
50 	reg = readl(factors->reg);  in clk_factors_recalc_rate()
53 	if (config->nwidth != SUNXI_FACTORS_NOT_APPLICABLE)  in clk_factors_recalc_rate()
54 		n = FACTOR_GET(config->nshift, config->nwidth, reg);  in clk_factors_recalc_rate()
55 	if (config->kwidth != SUNXI_FACTORS_NOT_APPLICABLE)  in clk_factors_recalc_rate()
56 		k = FACTOR_GET(config->kshift, config->kwidth, reg);  in clk_factors_recalc_rate()
57 	if (config->mwidth != SUNXI_FACTORS_NOT_APPLICABLE)  in clk_factors_recalc_rate()
58 		m = FACTOR_GET(config->mshift, config->mwidth, reg);  in clk_factors_recalc_rate()
59 	if (config->pwidth != SUNXI_FACTORS_NOT_APPLICABLE)  in clk_factors_recalc_rate()
60 		p = FACTOR_GET(config->pshift, config->pwidth, reg);  in clk_factors_recalc_rate()
62 	if (factors->recalc) {  in clk_factors_recalc_rate()
71 		/* get mux details from mux clk structure */  in clk_factors_recalc_rate()
72 		if (factors->mux)  in clk_factors_recalc_rate()
74 				(reg >> factors->mux->shift) &  in clk_factors_recalc_rate()
75 				factors->mux->mask;  in clk_factors_recalc_rate()
77 		factors->recalc(&factors_req);  in clk_factors_recalc_rate()
83 	rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1);  in clk_factors_recalc_rate()
100 			.rate = req->rate,  in clk_factors_determine_rate()
107 			parent_rate = clk_hw_round_rate(parent, req->rate);  in clk_factors_determine_rate()
112 		factors->get_factors(&factors_req);  in clk_factors_determine_rate()
115 		if (child_rate <= req->rate && child_rate > best_child_rate) {  in clk_factors_determine_rate()
123 		return -EINVAL;  in clk_factors_determine_rate()
125 	req->best_parent_hw = best_parent;  in clk_factors_determine_rate()
126 	req->best_parent_rate = best;  in clk_factors_determine_rate()
127 	req->rate = best_child_rate;  in clk_factors_determine_rate()
141 	const struct clk_factors_config *config = factors->config;  in clk_factors_set_rate()  local
144 	factors->get_factors(&req);  in clk_factors_set_rate()
146 	if (factors->lock)  in clk_factors_set_rate()
147 		spin_lock_irqsave(factors->lock, flags);  in clk_factors_set_rate()
150 	reg = readl(factors->reg);  in clk_factors_set_rate()
152 	/* Set up the new factors - macros do not do anything if width is 0 */  in clk_factors_set_rate()
153 	reg = FACTOR_SET(config->nshift, config->nwidth, reg, req.n);  in clk_factors_set_rate()
154 	reg = FACTOR_SET(config->kshift, config->kwidth, reg, req.k);  in clk_factors_set_rate()
155 	reg = FACTOR_SET(config->mshift, config->mwidth, reg, req.m);  in clk_factors_set_rate()
156 	reg = FACTOR_SET(config->pshift, config->pwidth, reg, req.p);  in clk_factors_set_rate()
159 	writel(reg, factors->reg);  in clk_factors_set_rate()
161 	/* delay 500us so pll stabilizes */  in clk_factors_set_rate()
164 	if (factors->lock)  in clk_factors_set_rate()
165 		spin_unlock_irqrestore(factors->lock, flags);  in clk_factors_set_rate()
184 	struct clk_mux *mux = NULL;  in __sunxi_factors_register()  local
187 	const char *clk_name = node->name;  in __sunxi_factors_register()
191 	/* if we have a mux, we will have >1 parents */  in __sunxi_factors_register()
198 	if (data->name)  in __sunxi_factors_register()
199 		clk_name = data->name;  in __sunxi_factors_register()
201 		of_property_read_string(node, "clock-output-names", &clk_name);  in __sunxi_factors_register()
208 	factors->reg = reg;  in __sunxi_factors_register()
209 	factors->config = data->table;  in __sunxi_factors_register()
210 	factors->get_factors = data->getter;  in __sunxi_factors_register()
211 	factors->recalc = data->recalc;  in __sunxi_factors_register()
212 	factors->lock = lock;  in __sunxi_factors_register()
215 	if (data->enable) {  in __sunxi_factors_register()
220 		factors->gate = gate;  in __sunxi_factors_register()
223 		gate->reg = reg;  in __sunxi_factors_register()
224 		gate->bit_idx = data->enable;  in __sunxi_factors_register()
225 		gate->lock = factors->lock;  in __sunxi_factors_register()
226 		gate_hw = &gate->hw;  in __sunxi_factors_register()
229 	/* Add a mux if this factor clock can be muxed */  in __sunxi_factors_register()
230 	if (data->mux) {  in __sunxi_factors_register()
231 		mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);  in __sunxi_factors_register()
232 		if (!mux)  in __sunxi_factors_register()
235 		factors->mux = mux;  in __sunxi_factors_register()
238 		mux->reg = reg;  in __sunxi_factors_register()
239 		mux->shift = data->mux;  in __sunxi_factors_register()
240 		mux->mask = data->muxmask;  in __sunxi_factors_register()
241 		mux->lock = factors->lock;  in __sunxi_factors_register()
242 		mux_hw = &mux->hw;  in __sunxi_factors_register()
248 			&factors->hw, &clk_factors_ops,  in __sunxi_factors_register()
263 	kfree(mux);  in __sunxi_factors_register()
301 	kfree(factors->mux);  in sunxi_factors_unregister()
302 	kfree(factors->gate);  in sunxi_factors_unregister()