clk/sunxi/clk-a10-ve.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2015 Chen-Yu Tsai
5  * Chen-Yu Tsai <wens@csie.org>
8 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
24  * sunxi_ve_reset... - reset bit in ve clk registers handling
42 	spin_lock_irqsave(data->lock, flags);  in sunxi_ve_reset_assert()
44 	reg = readl(data->reg);  in sunxi_ve_reset_assert()
45 	writel(reg & ~BIT(SUN4I_VE_RESET), data->reg);  in sunxi_ve_reset_assert()
47 	spin_unlock_irqrestore(data->lock, flags);  in sunxi_ve_reset_assert()
61 	spin_lock_irqsave(data->lock, flags);  in sunxi_ve_reset_deassert()
63 	reg = readl(data->reg);  in sunxi_ve_reset_deassert()
64 	writel(reg | BIT(SUN4I_VE_RESET), data->reg);  in sunxi_ve_reset_deassert()
66 	spin_unlock_irqrestore(data->lock, flags);  in sunxi_ve_reset_deassert()
74 	if (WARN_ON(reset_spec->args_count != 0))  in sunxi_ve_of_xlate()
75 		return -EINVAL;  in sunxi_ve_of_xlate()
87 	struct clk *clk;  in sun4i_ve_clk_setup()  local
92 	const char *clk_name = node->name;  in sun4i_ve_clk_setup()
108 	of_property_read_string(node, "clock-output-names", &clk_name);  in sun4i_ve_clk_setup()
111 	gate->reg = reg;  in sun4i_ve_clk_setup()
112 	gate->bit_idx = SUN4I_VE_ENABLE;  in sun4i_ve_clk_setup()
113 	gate->lock = &ve_lock;  in sun4i_ve_clk_setup()
115 	div->reg = reg;  in sun4i_ve_clk_setup()
116 	div->shift = SUN4I_VE_DIVIDER_SHIFT;  in sun4i_ve_clk_setup()
117 	div->width = SUN4I_VE_DIVIDER_WIDTH;  in sun4i_ve_clk_setup()
118 	div->lock = &ve_lock;  in sun4i_ve_clk_setup()
120 	clk = clk_register_composite(NULL, clk_name, &parent, 1,  in sun4i_ve_clk_setup()
122 				     &div->hw, &clk_divider_ops,  in sun4i_ve_clk_setup()
123 				     &gate->hw, &clk_gate_ops,  in sun4i_ve_clk_setup()
125 	if (IS_ERR(clk))  in sun4i_ve_clk_setup()
128 	err = of_clk_add_provider(node, of_clk_src_simple_get, clk);  in sun4i_ve_clk_setup()
136 	reset_data->reg = reg;  in sun4i_ve_clk_setup()
137 	reset_data->lock = &ve_lock;  in sun4i_ve_clk_setup()
138 	reset_data->rcdev.nr_resets = 1;  in sun4i_ve_clk_setup()
139 	reset_data->rcdev.ops = &sunxi_ve_reset_ops;  in sun4i_ve_clk_setup()
140 	reset_data->rcdev.of_node = node;  in sun4i_ve_clk_setup()
141 	reset_data->rcdev.of_xlate = sunxi_ve_of_xlate;  in sun4i_ve_clk_setup()
142 	reset_data->rcdev.of_reset_n_cells = 0;  in sun4i_ve_clk_setup()
143 	err = reset_controller_register(&reset_data->rcdev);  in sun4i_ve_clk_setup()
154 	clk_unregister(clk);  in sun4i_ve_clk_setup()
162 CLK_OF_DECLARE(sun4i_ve, "allwinner,sun4i-a10-ve-clk",