16 	struct clk_hw *parent, *grandparent;  in ccu_phase_get_phase()  local
29 	/* Get our parent clock, it's the one that can adjust its rate */  in ccu_phase_get_phase()
30 	parent = clk_hw_get_parent(hw);  in ccu_phase_get_phase()
31 	if (!parent)  in ccu_phase_get_phase()
35 	parent_rate = clk_hw_get_rate(parent);  in ccu_phase_get_phase()
39 	/* Now, get our parent's parent (most likely some PLL) */  in ccu_phase_get_phase()
40 	grandparent = clk_hw_get_parent(parent);  in ccu_phase_get_phase()
49 	/* Get our parent clock divider */  in ccu_phase_get_phase()
59 	struct clk_hw *parent, *grandparent;  in ccu_phase_set_phase()  local
65 	/* Get our parent clock, it's the one that can adjust its rate */  in ccu_phase_set_phase()
66 	parent = clk_hw_get_parent(hw);  in ccu_phase_set_phase()
67 	if (!parent)  in ccu_phase_set_phase()
71 	parent_rate = clk_hw_get_rate(parent);  in ccu_phase_set_phase()
75 	/* Now, get our parent's parent (most likely some PLL) */  in ccu_phase_set_phase()
76 	grandparent = clk_hw_get_parent(parent);  in ccu_phase_set_phase()
88 		/* Get our parent divider */  in ccu_phase_set_phase()
95 		 * Since our parent clock is only a divider, and the  in ccu_phase_set_phase()
102 		 * the divider set by our parent clock.  in ccu_phase_set_phase()