clk/sunxi-ng/ccu-sun9i-a80-de.c

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
7 #include <linux/clk-provider.h>
17 #include "ccu-sun9i-a80-de.h"
19 static SUNXI_CCU_GATE(fe0_clk,		"fe0",		"fe0-div",
21 static SUNXI_CCU_GATE(fe1_clk,		"fe1",		"fe1-div",
23 static SUNXI_CCU_GATE(fe2_clk,		"fe2",		"fe2-div",
25 static SUNXI_CCU_GATE(iep_deu0_clk,	"iep-deu0",	"de",
27 static SUNXI_CCU_GATE(iep_deu1_clk,	"iep-deu1",	"de",
29 static SUNXI_CCU_GATE(be0_clk,		"be0",		"be0-div",
31 static SUNXI_CCU_GATE(be1_clk,		"be1",		"be1-div",
33 static SUNXI_CCU_GATE(be2_clk,		"be2",		"be2-div",
35 static SUNXI_CCU_GATE(iep_drc0_clk,	"iep-drc0",	"de",
37 static SUNXI_CCU_GATE(iep_drc1_clk,	"iep-drc1",	"de",
39 static SUNXI_CCU_GATE(merge_clk,	"merge",	"de",
42 static SUNXI_CCU_GATE(dram_fe0_clk,	"dram-fe0",	"sdram",
44 static SUNXI_CCU_GATE(dram_fe1_clk,	"dram-fe1",	"sdram",
46 static SUNXI_CCU_GATE(dram_fe2_clk,	"dram-fe2",	"sdram",
48 static SUNXI_CCU_GATE(dram_deu0_clk,	"dram-deu0",	"sdram",
50 static SUNXI_CCU_GATE(dram_deu1_clk,	"dram-deu1",	"sdram",
52 static SUNXI_CCU_GATE(dram_be0_clk,	"dram-be0",	"sdram",
54 static SUNXI_CCU_GATE(dram_be1_clk,	"dram-be1",	"sdram",
56 static SUNXI_CCU_GATE(dram_be2_clk,	"dram-be2",	"sdram",
58 static SUNXI_CCU_GATE(dram_drc0_clk,	"dram-drc0",	"sdram",
60 static SUNXI_CCU_GATE(dram_drc1_clk,	"dram-drc1",	"sdram",
63 static SUNXI_CCU_GATE(bus_fe0_clk,	"bus-fe0",	"bus-de",
65 static SUNXI_CCU_GATE(bus_fe1_clk,	"bus-fe1",	"bus-de",
67 static SUNXI_CCU_GATE(bus_fe2_clk,	"bus-fe2",	"bus-de",
69 static SUNXI_CCU_GATE(bus_deu0_clk,	"bus-deu0",	"bus-de",
71 static SUNXI_CCU_GATE(bus_deu1_clk,	"bus-deu1",	"bus-de",
73 static SUNXI_CCU_GATE(bus_be0_clk,	"bus-be0",	"bus-de",
75 static SUNXI_CCU_GATE(bus_be1_clk,	"bus-be1",	"bus-de",
77 static SUNXI_CCU_GATE(bus_be2_clk,	"bus-be2",	"bus-de",
79 static SUNXI_CCU_GATE(bus_drc0_clk,	"bus-drc0",	"bus-de",
81 static SUNXI_CCU_GATE(bus_drc1_clk,	"bus-drc1",	"bus-de",
84 static SUNXI_CCU_M(fe0_div_clk, "fe0-div", "de", 0x20, 0, 4, 0);
85 static SUNXI_CCU_M(fe1_div_clk, "fe1-div", "de", 0x20, 4, 4, 0);
86 static SUNXI_CCU_M(fe2_div_clk, "fe2-div", "de", 0x20, 8, 4, 0);
87 static SUNXI_CCU_M(be0_div_clk, "be0-div", "de", 0x20, 16, 4, 0);
88 static SUNXI_CCU_M(be1_div_clk, "be1-div", "de", 0x20, 20, 4, 0);
89 static SUNXI_CCU_M(be2_div_clk, "be2-div", "de", 0x20, 24, 4, 0);
215 	bus_clk = devm_clk_get(&pdev->dev, "bus");  in sun9i_a80_de_clk_probe()
217 		return dev_err_probe(&pdev->dev, PTR_ERR(bus_clk),  in sun9i_a80_de_clk_probe()
220 	rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);  in sun9i_a80_de_clk_probe()
222 		return dev_err_probe(&pdev->dev, PTR_ERR(rstc),  in sun9i_a80_de_clk_probe()
228 		dev_err(&pdev->dev, "Couldn't enable bus clk: %d\n", ret);  in sun9i_a80_de_clk_probe()
235 		dev_err(&pdev->dev,  in sun9i_a80_de_clk_probe()
240 	ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun9i_a80_de_clk_desc);  in sun9i_a80_de_clk_probe()
254 	{ .compatible = "allwinner,sun9i-a80-de-clks" },
262 		.name	= "sun9i-a80-de-clks",
270 MODULE_DESCRIPTION("Support for the Allwinner A80 Display Engine CCU");