Lines Matching full:ahb1
170 .hw.init = CLK_HW_INIT_PARENTS("ahb1",
184 static SUNXI_CCU_DIV_TABLE(apb1_clk, "apb1", "ahb1",
195 static const char * const ahb2_parents[] = { "ahb1" , "pll-periph0" };
217 static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "ahb1",
219 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "ahb1",
221 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb1",
223 static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb1",
225 static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "ahb1",
227 static SUNXI_CCU_GATE(bus_nand_clk, "bus-nand", "ahb1",
229 static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "ahb1",
233 static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb1",
235 static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "ahb1",
237 static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb1",
239 static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "ahb1",
241 static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb1",
243 static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "ahb1",
251 static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "ahb1",
260 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb1",
262 static SUNXI_CCU_GATE(bus_tcon0_clk, "bus-tcon0", "ahb1",
264 static SUNXI_CCU_GATE(bus_tcon1_clk, "bus-tcon1", "ahb1",
266 static SUNXI_CCU_GATE(bus_deinterlace_clk, "bus-deinterlace", "ahb1",
268 static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb1",
270 static SUNXI_CCU_GATE(bus_tve_clk, "bus-tve", "ahb1",
272 static SUNXI_CCU_GATE(bus_hdmi_clk, "bus-hdmi", "ahb1",
274 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1",
276 static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
278 static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
280 static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",
317 static SUNXI_CCU_GATE(bus_ephy_clk, "bus-ephy", "ahb1",
319 static SUNXI_CCU_GATE(bus_dbg_clk, "bus-dbg", "ahb1",