Lines Matching full:ahb1
257 .hw.init = CLK_HW_INIT_PARENTS("ahb1",
264 static SUNXI_CCU_M(apb1_clk, "apb1", "ahb1", 0x054, 8, 2, 0);
275 static const char * const ahb2_parents[] = { "ahb1", "pll-periph" };
295 static SUNXI_CCU_GATE(bus_mipi_dsi_clk, "bus-mipi-dsi", "ahb1",
297 static SUNXI_CCU_GATE(bus_ss_clk, "bus-ss", "ahb1",
299 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "ahb1",
301 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb1",
303 static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb1",
305 static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "ahb1",
307 static SUNXI_CCU_GATE(bus_nand_clk, "bus-nand", "ahb1",
309 static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "ahb1",
313 static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "ahb1",
315 static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb1",
317 static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "ahb1",
319 static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb1",
328 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb1",
330 static SUNXI_CCU_GATE(bus_tcon0_clk, "bus-tcon0", "ahb1",
332 static SUNXI_CCU_GATE(bus_tcon1_clk, "bus-tcon1", "ahb1",
334 static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb1",
336 static SUNXI_CCU_GATE(bus_hdmi_clk, "bus-hdmi", "ahb1",
338 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1",
340 static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
342 static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
344 static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",