clk/sunxi-ng/ccu-sun50i-a100.c

1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
23 #include "ccu-sun50i-a100.h"
50 		.hw.init	= CLK_HW_INIT("pll-cpux", "dcxo24M",
66 		.hw.init	= CLK_HW_INIT("pll-ddr0", "dcxo24M",
84 		.hw.init	= CLK_HW_INIT("pll-periph0", "dcxo24M",
101 		.hw.init	= CLK_HW_INIT("pll-periph1", "dcxo24M",
117 		.hw.init	= CLK_HW_INIT("pll-gpu", "dcxo24M",
137 		.hw.init	= CLK_HW_INIT("pll-video0", "dcxo24M",
153 		.hw.init	= CLK_HW_INIT("pll-video1", "dcxo24M",
169 		.hw.init	= CLK_HW_INIT("pll-video2", "dcxo24M",
184 		.hw.init	= CLK_HW_INIT("pll-ve", "dcxo24M",
210 		.hw.init	= CLK_HW_INIT("pll-com", "dcxo24M",
226 		.hw.init	= CLK_HW_INIT("pll-video3", "dcxo24M",
258 		.hw.init	= CLK_HW_INIT("pll-audio", "dcxo24M",
265 					     "iosc", "pll-cpux",
266 					      "pll-periph0" };
270 static SUNXI_CCU_M(cpux_apb_clk, "cpux-apb", "cpux", 0x500, 8, 2, 0);
273 						      "iosc", "pll-periph0",
274 						      "pll-periph0-2x" };
275 static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ahb2_clk, "psi-ahb1-ahb2",
283 						       "psi-ahb1-ahb2",
284 						       "pll-periph0",
285 						       "pll-periph0-2x" };
304 static const char * const mbus_parents[] = { "dcxo24M", "pll-ddr0",
305 					     "pll-periph0",
306 					     "pll-periph0-2x" };
313 static const char * const de_parents[] = { "pll-com", "pll-periph0-2x" };
320 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "psi-ahb1-ahb2",
323 static const char * const g2d_parents[] = { "pll-com", "pll-periph0-2x",
324 					     "pll-video0-2x", "pll-video1-2x",
325 					     "pll-video2-2x"};
334 static SUNXI_CCU_GATE(bus_g2d_clk, "bus-g2d", "psi-ahb1-ahb2",
337 static const char * const gpu_parents[] = { "pll-gpu" };
344 static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "psi-ahb1-ahb2",
347 static const char * const ce_parents[] = { "dcxo24M", "pll-periph0-2x" };
355 static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "psi-ahb1-ahb2",
358 static const char * const ve_parents[] = { "pll-ve" };
365 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "psi-ahb1-ahb2",
368 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "psi-ahb1-ahb2",
371 static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "psi-ahb1-ahb2",
374 static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "psi-ahb1-ahb2",
377 static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "psi-ahb1-ahb2",
382 static SUNXI_CCU_GATE(bus_dbg_clk, "bus-dbg", "psi-ahb1-ahb2",
385 static SUNXI_CCU_GATE(bus_psi_clk, "bus-psi", "psi-ahb1-ahb2",
388 static SUNXI_CCU_GATE(bus_pwm_clk, "bus-pwm", "apb1", 0x7ac, BIT(0), 0);
390 static SUNXI_CCU_GATE(bus_iommu_clk, "bus-iommu", "apb1", 0x7bc, BIT(0), 0);
392 static SUNXI_CCU_GATE(mbus_dma_clk, "mbus-dma", "mbus",
394 static SUNXI_CCU_GATE(mbus_ve_clk, "mbus-ve", "mbus",
396 static SUNXI_CCU_GATE(mbus_ce_clk, "mbus-ce", "mbus",
398 static SUNXI_CCU_GATE(mbus_nand_clk, "mbus-nand", "mbus",
400 static SUNXI_CCU_GATE(mbus_csi_clk, "mbus-csi", "mbus",
402 static SUNXI_CCU_GATE(mbus_isp_clk, "mbus-isp", "mbus",
404 static SUNXI_CCU_GATE(mbus_g2d_clk, "mbus-g2d", "mbus",
407 static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "psi-ahb1-ahb2",
411 						 "pll-periph0",
412 						 "pll-periph1",
413 						 "pll-periph0-2x",
414 						 "pll-periph1-2x" };
429 static SUNXI_CCU_GATE(bus_nand_clk, "bus-nand", "ahb3", 0x82c, BIT(0), 0);
431 static const char * const mmc_parents[] = { "dcxo24M", "pll-periph0-2x",
432 					    "pll-periph1-2x" };
438 					  2,		/* post-div */
446 					  2,		/* post-div */
454 					  2,		/* post-div */
457 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0);
458 static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0);
459 static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "ahb3", 0x84c, BIT(2), 0);
461 static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb2", 0x90c, BIT(0), 0);
462 static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb2", 0x90c, BIT(1), 0);
463 static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb2", 0x90c, BIT(2), 0);
464 static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb2", 0x90c, BIT(3), 0);
465 static SUNXI_CCU_GATE(bus_uart4_clk, "bus-uart4", "apb2", 0x90c, BIT(4), 0);
467 static SUNXI_CCU_GATE(bus_i2c0_clk, "bus-i2c0", "apb2", 0x91c, BIT(0), 0);
468 static SUNXI_CCU_GATE(bus_i2c1_clk, "bus-i2c1", "apb2", 0x91c, BIT(1), 0);
469 static SUNXI_CCU_GATE(bus_i2c2_clk, "bus-i2c2", "apb2", 0x91c, BIT(2), 0);
470 static SUNXI_CCU_GATE(bus_i2c3_clk, "bus-i2c3", "apb2", 0x91c, BIT(3), 0);
493 static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb3", 0x96c, BIT(0), 0);
494 static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "ahb3", 0x96c, BIT(1), 0);
495 static SUNXI_CCU_GATE(bus_spi2_clk, "bus-spi2", "ahb3", 0x96c, BIT(2), 0);
497 static SUNXI_CCU_GATE(emac_25m_clk, "emac-25m", "ahb3", 0x970,
500 static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb3", 0x97c, BIT(0), 0);
503 					   "pll-periph0", "pll-periph1" };
504 static SUNXI_CCU_MP_WITH_MUX_GATE(ir_rx_clk, "ir-rx", ir_parents, 0x990,
511 static SUNXI_CCU_GATE(bus_ir_rx_clk, "bus-ir-rx", "ahb3", 0x99c, BIT(0), 0);
513 static SUNXI_CCU_MP_WITH_MUX_GATE(ir_tx_clk, "ir-tx", ir_parents, 0x9c0,
520 static SUNXI_CCU_GATE(bus_ir_tx_clk, "bus-ir-tx", "apb1", 0x9cc, BIT(0), 0);
522 static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb1", 0x9ec, BIT(0), 0);
524 static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1", 0x9fc, BIT(0), 0);
526 static const char * const audio_parents[] = { "pll-audio", "pll-com-audio" };
579 static SUNXI_CCU_GATE(bus_i2s0_clk, "bus-i2s0", "apb1", 0xa20, BIT(0), 0);
580 static SUNXI_CCU_GATE(bus_i2s1_clk, "bus-i2s1", "apb1", 0xa20, BIT(1), 0);
581 static SUNXI_CCU_GATE(bus_i2s2_clk, "bus-i2s2", "apb1", 0xa20, BIT(2), 0);
582 static SUNXI_CCU_GATE(bus_i2s3_clk, "bus-i2s3", "apb1", 0xa20, BIT(3), 0);
597 static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", "apb1", 0xa2c, BIT(0), 0);
612 static SUNXI_CCU_GATE(bus_dmic_clk, "bus-dmic", "apb1", 0xa4c, BIT(0), 0);
614 static SUNXI_CCU_M_WITH_MUX_GATE(audio_codec_dac_clk, "audio-codec-dac",
621 static SUNXI_CCU_M_WITH_MUX_GATE(audio_codec_adc_clk, "audio-codec-adc",
628 static SUNXI_CCU_M_WITH_MUX_GATE(audio_codec_4x_clk, "audio-codec-4x",
635 static SUNXI_CCU_GATE(bus_audio_codec_clk, "bus-audio-codec", "apb1", 0xa5c,
645 static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc12M", 0xa70, BIT(31), 0);
646 static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "dcxo24M", 0xa70, BIT(29), 0);
648 static SUNXI_CCU_GATE(usb_ohci1_clk, "usb-ohci1", "osc12M", 0xa74, BIT(31), 0);
649 static SUNXI_CCU_GATE(usb_phy1_clk, "usb-phy1", "dcxo24M", 0xa74, BIT(29), 0);
651 static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "ahb3", 0xa8c, BIT(0), 0);
652 static SUNXI_CCU_GATE(bus_ohci1_clk, "bus-ohci1", "ahb3", 0xa8c, BIT(1), 0);
653 static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "ahb3", 0xa8c, BIT(4), 0);
654 static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "ahb3", 0xa8c, BIT(5), 0);
655 static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb3", 0xa8c, BIT(8), 0);
657 static SUNXI_CCU_GATE(bus_lradc_clk, "bus-lradc", "ahb3", 0xa9c, BIT(0), 0);
659 static SUNXI_CCU_GATE(bus_dpss_top0_clk, "bus-dpss-top0", "ahb3",
662 static SUNXI_CCU_GATE(bus_dpss_top1_clk, "bus-dpss-top1", "ahb3",
665 static const char * const mipi_dsi_parents[] = { "dcxo24M", "pll-periph0-2x",
666 						 "pll-periph0" };
667 static SUNXI_CCU_M_WITH_MUX_GATE(mipi_dsi_clk, "mipi-dsi",
675 static SUNXI_CCU_GATE(bus_mipi_dsi_clk, "bus-mipi-dsi", "ahb3",
678 static const char * const tcon_lcd_parents[] = { "pll-video0-4x",
679 						  "pll-video1-4x",
680 						  "pll-video2-4x",
681 						  "pll-video3-4x",
682 						  "pll-periph0-2x" };
683 static SUNXI_CCU_MP_WITH_MUX_GATE(tcon_lcd_clk, "tcon-lcd0",
691 static SUNXI_CCU_GATE(bus_tcon_lcd_clk, "bus-tcon-lcd0", "ahb3",
695 					     "pll-periph0" };
696 static SUNXI_CCU_MP_WITH_MUX_GATE(ledc_clk, "ledc",
704 static SUNXI_CCU_GATE(bus_ledc_clk, "bus-ledc", "ahb3", 0xbfc, BIT(0), 0);
706 static const char * const csi_top_parents[] = { "pll-periph0-2x",
707 						"pll-video0-2x",
708 						"pll-video1-2x",
709 						"pll-video2-2x",
710 						"pll-video3-2x" };
711 static SUNXI_CCU_M_WITH_MUX_GATE(csi_top_clk, "csi-top",
718 static const char * const csi0_mclk_parents[] = { "dcxo24M", "pll-video2",
719 						  "pll-video3", "pll-video0",
720 						  "pll-video1" };
721 static SUNXI_CCU_M_WITH_MUX_GATE(csi0_mclk_clk, "csi0-mclk",
728 static const char * const csi1_mclk_parents[] = { "dcxo24M", "pll-video3",
729 						  "pll-video0", "pll-video1",
730 						  "pll-video2" };
731 static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi1-mclk",
738 static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb3", 0xc1c, BIT(0), 0);
740 static const char * const csi_isp_parents[] = { "pll-periph0-2x",
741 						"pll-video0-2x",
742 						"pll-video1-2x",
743 						"pll-video2-2x",
744 						"pll-video3-2x" };
745 static SUNXI_CCU_M_WITH_MUX_GATE(csi_isp_clk, "csi-isp",
755 static CLK_FIXED_FACTOR_HW(pll_com_audio_clk, "pll-com-audio",
759 static CLK_FIXED_FACTOR_HW(pll_periph0_2x_clk, "pll-periph0-2x",
763 static CLK_FIXED_FACTOR_HW(pll_periph1_2x_clk, "pll-periph1-2x",
770 static CLK_FIXED_FACTOR_HWS(pll_video0_4x_clk, "pll-video0-4x",
773 static CLK_FIXED_FACTOR_HWS(pll_video0_2x_clk, "pll-video0-2x",
780 static CLK_FIXED_FACTOR_HWS(pll_video1_4x_clk, "pll-video1-4x",
783 static CLK_FIXED_FACTOR_HWS(pll_video1_2x_clk, "pll-video1-2x",
790 static CLK_FIXED_FACTOR_HWS(pll_video2_4x_clk, "pll-video2-4x",
793 static CLK_FIXED_FACTOR_HWS(pll_video2_2x_clk, "pll-video2-2x",
800 static CLK_FIXED_FACTOR_HWS(pll_video3_4x_clk, "pll-video3-4x",
803 static CLK_FIXED_FACTOR_HWS(pll_video3_2x_clk, "pll-video3-2x",
1219 	 * See the comment before pll-video0 definition for the reason.  in sun50i_a100_ccu_probe()
1230 	 * See the comment before pll-audio definition for the reason.  in sun50i_a100_ccu_probe()
1249 	ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a100_ccu_desc);  in sun50i_a100_ccu_probe()
1264 	{ .compatible = "allwinner,sun50i-a100-ccu" },
1272 		.name	= "sun50i-a100-ccu",
1280 MODULE_DESCRIPTION("Support for the Allwinner A100 CCU");