clk/stm32/stm32mp13_rcc.h

1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
3  * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
225 #define RCC_SECCFGR_APB3DIVSEC		16
238 #define RCC_MP_SREQSETR_STPREQ_P0	BIT(0)
241 #define RCC_MP_SREQCLRR_STPREQ_P0	BIT(0)
244 #define RCC_MP_APRSTCR_RDCTLEN		BIT(0)
257 #define RCC_MP_GRSTCSETR_MPSYSRST	BIT(0)
258 #define RCC_MP_GRSTCSETR_MPUP0RST	BIT(4)
261 #define RCC_BR_RSTSCLRR_PORRSTF		BIT(0)
262 #define RCC_BR_RSTSCLRR_BORRSTF		BIT(1)
263 #define RCC_BR_RSTSCLRR_PADRSTF		BIT(2)
264 #define RCC_BR_RSTSCLRR_HCSSRSTF	BIT(3)
265 #define RCC_BR_RSTSCLRR_VCORERSTF	BIT(4)
266 #define RCC_BR_RSTSCLRR_VCPURSTF	BIT(5)
267 #define RCC_BR_RSTSCLRR_MPSYSRSTF	BIT(6)
268 #define RCC_BR_RSTSCLRR_IWDG1RSTF	BIT(8)
269 #define RCC_BR_RSTSCLRR_IWDG2RSTF	BIT(9)
270 #define RCC_BR_RSTSCLRR_MPUP0RSTF	BIT(13)
273 #define RCC_MP_RSTSSETR_PORRSTF		BIT(0)
274 #define RCC_MP_RSTSSETR_BORRSTF		BIT(1)
275 #define RCC_MP_RSTSSETR_PADRSTF		BIT(2)
276 #define RCC_MP_RSTSSETR_HCSSRSTF	BIT(3)
277 #define RCC_MP_RSTSSETR_VCORERSTF	BIT(4)
278 #define RCC_MP_RSTSSETR_VCPURSTF	BIT(5)
279 #define RCC_MP_RSTSSETR_MPSYSRSTF	BIT(6)
280 #define RCC_MP_RSTSSETR_IWDG1RSTF	BIT(8)
281 #define RCC_MP_RSTSSETR_IWDG2RSTF	BIT(9)
282 #define RCC_MP_RSTSSETR_STP2RSTF	BIT(10)
283 #define RCC_MP_RSTSSETR_STDBYRSTF	BIT(11)
284 #define RCC_MP_RSTSSETR_CSTDBYRSTF	BIT(12)
285 #define RCC_MP_RSTSSETR_MPUP0RSTF	BIT(13)
286 #define RCC_MP_RSTSSETR_SPARE		BIT(15)
289 #define RCC_MP_RSTSCLRR_PORRSTF		BIT(0)
290 #define RCC_MP_RSTSCLRR_BORRSTF		BIT(1)
291 #define RCC_MP_RSTSCLRR_PADRSTF		BIT(2)
292 #define RCC_MP_RSTSCLRR_HCSSRSTF	BIT(3)
293 #define RCC_MP_RSTSCLRR_VCORERSTF	BIT(4)
294 #define RCC_MP_RSTSCLRR_VCPURSTF	BIT(5)
295 #define RCC_MP_RSTSCLRR_MPSYSRSTF	BIT(6)
296 #define RCC_MP_RSTSCLRR_IWDG1RSTF	BIT(8)
297 #define RCC_MP_RSTSCLRR_IWDG2RSTF	BIT(9)
298 #define RCC_MP_RSTSCLRR_STP2RSTF	BIT(10)
299 #define RCC_MP_RSTSCLRR_STDBYRSTF	BIT(11)
300 #define RCC_MP_RSTSCLRR_CSTDBYRSTF	BIT(12)
301 #define RCC_MP_RSTSCLRR_MPUP0RSTF	BIT(13)
302 #define RCC_MP_RSTSCLRR_SPARE		BIT(15)
305 #define RCC_MP_IWDGFZSETR_FZ_IWDG1	BIT(0)
306 #define RCC_MP_IWDGFZSETR_FZ_IWDG2	BIT(1)
309 #define RCC_MP_IWDGFZCLRR_FZ_IWDG1	BIT(0)
310 #define RCC_MP_IWDGFZCLRR_FZ_IWDG2	BIT(1)
313 #define RCC_MP_CIER_LSIRDYIE		BIT(0)
314 #define RCC_MP_CIER_LSERDYIE		BIT(1)
315 #define RCC_MP_CIER_HSIRDYIE		BIT(2)
316 #define RCC_MP_CIER_HSERDYIE		BIT(3)
317 #define RCC_MP_CIER_CSIRDYIE		BIT(4)
318 #define RCC_MP_CIER_PLL1DYIE		BIT(8)
319 #define RCC_MP_CIER_PLL2DYIE		BIT(9)
320 #define RCC_MP_CIER_PLL3DYIE		BIT(10)
321 #define RCC_MP_CIER_PLL4DYIE		BIT(11)
322 #define RCC_MP_CIER_LSECSSIE		BIT(16)
323 #define RCC_MP_CIER_WKUPIE		BIT(20)
326 #define RCC_MP_CIFR_LSIRDYF		BIT(0)
327 #define RCC_MP_CIFR_LSERDYF		BIT(1)
328 #define RCC_MP_CIFR_HSIRDYF		BIT(2)
329 #define RCC_MP_CIFR_HSERDYF		BIT(3)
330 #define RCC_MP_CIFR_CSIRDYF		BIT(4)
331 #define RCC_MP_CIFR_PLL1DYF		BIT(8)
332 #define RCC_MP_CIFR_PLL2DYF		BIT(9)
333 #define RCC_MP_CIFR_PLL3DYF		BIT(10)
334 #define RCC_MP_CIFR_PLL4DYF		BIT(11)
335 #define RCC_MP_CIFR_LSECSSF		BIT(16)
336 #define RCC_MP_CIFR_WKUPF		BIT(20)
339 #define RCC_BDCR_LSEON			BIT(0)
340 #define RCC_BDCR_LSEBYP			BIT(1)
341 #define RCC_BDCR_LSERDY			BIT(2)
342 #define RCC_BDCR_DIGBYP			BIT(3)
344 #define RCC_BDCR_LSECSSON		BIT(8)
345 #define RCC_BDCR_LSECSSD		BIT(9)
346 #define RCC_BDCR_RTCSRC_MASK		GENMASK(17, 16)
347 #define RCC_BDCR_RTCCKEN		BIT(20)
348 #define RCC_BDCR_VSWRST			BIT(31)
350 #define RCC_BDCR_RTCSRC_SHIFT		16
353 #define RCC_RDLSICR_LSION		BIT(0)
354 #define RCC_RDLSICR_LSIRDY		BIT(1)
355 #define RCC_RDLSICR_MRD_MASK		GENMASK(20, 16)
358 #define RCC_RDLSICR_MRD_SHIFT		16
363 #define RCC_OCENSETR_HSION		BIT(0)
364 #define RCC_OCENSETR_HSIKERON		BIT(1)
365 #define RCC_OCENSETR_CSION		BIT(4)
366 #define RCC_OCENSETR_CSIKERON		BIT(5)
367 #define RCC_OCENSETR_DIGBYP		BIT(7)
368 #define RCC_OCENSETR_HSEON		BIT(8)
369 #define RCC_OCENSETR_HSEKERON		BIT(9)
370 #define RCC_OCENSETR_HSEBYP		BIT(10)
371 #define RCC_OCENSETR_HSECSSON		BIT(11)
374 #define RCC_OCENCLRR_HSION		BIT(0)
375 #define RCC_OCENCLRR_HSIKERON		BIT(1)
376 #define RCC_OCENCLRR_CSION		BIT(4)
377 #define RCC_OCENCLRR_CSIKERON		BIT(5)
378 #define RCC_OCENCLRR_DIGBYP		BIT(7)
379 #define RCC_OCENCLRR_HSEON		BIT(8)
380 #define RCC_OCENCLRR_HSEKERON		BIT(9)
381 #define RCC_OCENCLRR_HSEBYP		BIT(10)
384 #define RCC_OCRDYR_HSIRDY		BIT(0)
385 #define RCC_OCRDYR_HSIDIVRDY		BIT(2)
386 #define RCC_OCRDYR_CSIRDY		BIT(4)
387 #define RCC_OCRDYR_HSERDY		BIT(8)
388 #define RCC_OCRDYR_MPUCKRDY		BIT(23)
389 #define RCC_OCRDYR_AXICKRDY		BIT(24)
394 #define RCC_HSICFGR_HSICAL_MASK		GENMASK(27, 16)
397 #define RCC_HSICFGR_HSICAL_SHIFT	16
401 #define RCC_CSICFGR_CSICAL_MASK		GENMASK(23, 16)
403 #define RCC_CSICFGR_CSICAL_SHIFT	16
408 #define RCC_MCO1CFGR_MCO1ON		BIT(12)
415 #define RCC_MCO2CFGR_MCO2ON		BIT(12)
421 #define RCC_DBGCFGR_DBGCKEN		BIT(8)
422 #define RCC_DBGCFGR_TRACECKEN		BIT(9)
423 #define RCC_DBGCFGR_DBGRST		BIT(12)
428 #define RCC_RCK12SELR_PLL12SRCRDY	BIT(31)
433 #define RCC_RCK3SELR_PLL3SRCRDY		BIT(31)
438 #define RCC_RCK4SELR_PLL4SRCRDY		BIT(31)
442 #define RCC_PLL1CR_PLLON		BIT(0)
443 #define RCC_PLL1CR_PLL1RDY		BIT(1)
444 #define RCC_PLL1CR_SSCG_CTRL		BIT(2)
445 #define RCC_PLL1CR_DIVPEN		BIT(4)
446 #define RCC_PLL1CR_DIVQEN		BIT(5)
447 #define RCC_PLL1CR_DIVREN		BIT(6)
451 #define RCC_PLL1CFGR1_DIVM1_MASK	GENMASK(21, 16)
453 #define RCC_PLL1CFGR1_DIVM1_SHIFT	16
458 #define RCC_PLL1CFGR2_DIVR_MASK		GENMASK(22, 16)
461 #define RCC_PLL1CFGR2_DIVR_SHIFT	16
465 #define RCC_PLL1FRACR_FRACLE		BIT(16)
470 #define RCC_PLL1CSGR_TPDFN_DIS		BIT(13)
471 #define RCC_PLL1CSGR_RPDFN_DIS		BIT(14)
472 #define RCC_PLL1CSGR_SSCG_MODE		BIT(15)
473 #define RCC_PLL1CSGR_INC_STEP_MASK	GENMASK(30, 16)
475 #define RCC_PLL1CSGR_INC_STEP_SHIFT	16
478 #define RCC_PLL2CR_PLLON		BIT(0)
479 #define RCC_PLL2CR_PLL2RDY		BIT(1)
480 #define RCC_PLL2CR_SSCG_CTRL		BIT(2)
481 #define RCC_PLL2CR_DIVPEN		BIT(4)
482 #define RCC_PLL2CR_DIVQEN		BIT(5)
483 #define RCC_PLL2CR_DIVREN		BIT(6)
487 #define RCC_PLL2CFGR1_DIVM2_MASK	GENMASK(21, 16)
489 #define RCC_PLL2CFGR1_DIVM2_SHIFT	16
494 #define RCC_PLL2CFGR2_DIVR_MASK		GENMASK(22, 16)
497 #define RCC_PLL2CFGR2_DIVR_SHIFT	16
501 #define RCC_PLL2FRACR_FRACLE		BIT(16)
506 #define RCC_PLL2CSGR_TPDFN_DIS		BIT(13)
507 #define RCC_PLL2CSGR_RPDFN_DIS		BIT(14)
508 #define RCC_PLL2CSGR_SSCG_MODE		BIT(15)
509 #define RCC_PLL2CSGR_INC_STEP_MASK	GENMASK(30, 16)
511 #define RCC_PLL2CSGR_INC_STEP_SHIFT	16
514 #define RCC_PLL3CR_PLLON		BIT(0)
515 #define RCC_PLL3CR_PLL3RDY		BIT(1)
516 #define RCC_PLL3CR_SSCG_CTRL		BIT(2)
517 #define RCC_PLL3CR_DIVPEN		BIT(4)
518 #define RCC_PLL3CR_DIVQEN		BIT(5)
519 #define RCC_PLL3CR_DIVREN		BIT(6)
523 #define RCC_PLL3CFGR1_DIVM3_MASK	GENMASK(21, 16)
526 #define RCC_PLL3CFGR1_DIVM3_SHIFT	16
532 #define RCC_PLL3CFGR2_DIVR_MASK		GENMASK(22, 16)
535 #define RCC_PLL3CFGR2_DIVR_SHIFT	16
539 #define RCC_PLL3FRACR_FRACLE		BIT(16)
544 #define RCC_PLL3CSGR_TPDFN_DIS		BIT(13)
545 #define RCC_PLL3CSGR_RPDFN_DIS		BIT(14)
546 #define RCC_PLL3CSGR_SSCG_MODE		BIT(15)
547 #define RCC_PLL3CSGR_INC_STEP_MASK	GENMASK(30, 16)
549 #define RCC_PLL3CSGR_INC_STEP_SHIFT	16
552 #define RCC_PLL4CR_PLLON		BIT(0)
553 #define RCC_PLL4CR_PLL4RDY		BIT(1)
554 #define RCC_PLL4CR_SSCG_CTRL		BIT(2)
555 #define RCC_PLL4CR_DIVPEN		BIT(4)
556 #define RCC_PLL4CR_DIVQEN		BIT(5)
557 #define RCC_PLL4CR_DIVREN		BIT(6)
561 #define RCC_PLL4CFGR1_DIVM4_MASK	GENMASK(21, 16)
564 #define RCC_PLL4CFGR1_DIVM4_SHIFT	16
570 #define RCC_PLL4CFGR2_DIVR_MASK		GENMASK(22, 16)
573 #define RCC_PLL4CFGR2_DIVR_SHIFT	16
577 #define RCC_PLL4FRACR_FRACLE		BIT(16)
582 #define RCC_PLL4CSGR_TPDFN_DIS		BIT(13)
583 #define RCC_PLL4CSGR_RPDFN_DIS		BIT(14)
584 #define RCC_PLL4CSGR_SSCG_MODE		BIT(15)
585 #define RCC_PLL4CSGR_INC_STEP_MASK	GENMASK(30, 16)
587 #define RCC_PLL4CSGR_INC_STEP_SHIFT	16
591 #define RCC_MPCKSELR_MPUSRCRDY		BIT(31)
596 #define RCC_ASSCKSELR_AXISSRCRDY	BIT(31)
601 #define RCC_MSSCKSELR_MLAHBSSRCRDY	BIT(31)
614 #define RCC_MPCKDIVR_MPUDIVRDY		BIT(31)
619 #define RCC_AXIDIVR_AXIDIVRDY		BIT(31)
624 #define RCC_MLAHBDIVR_MLAHBDIVRDY	BIT(31)
629 #define RCC_APB1DIVR_APB1DIVRDY		BIT(31)
634 #define RCC_APB2DIVR_APB2DIVRDY		BIT(31)
639 #define RCC_APB3DIVR_APB3DIVRDY		BIT(31)
644 #define RCC_APB4DIVR_APB4DIVRDY		BIT(31)
649 #define RCC_APB5DIVR_APB5DIVRDY		BIT(31)
654 #define RCC_APB6DIVR_APB6DIVRDY		BIT(31)
658 #define RCC_TIMG1PRER_TIMG1PRE		BIT(0)
659 #define RCC_TIMG1PRER_TIMG1PRERDY	BIT(31)
662 #define RCC_TIMG2PRER_TIMG2PRE		BIT(0)
663 #define RCC_TIMG2PRER_TIMG2PRERDY	BIT(31)
666 #define RCC_TIMG3PRER_TIMG3PRE		BIT(0)
667 #define RCC_TIMG3PRER_TIMG3PRERDY	BIT(31)
670 #define RCC_DDRITFCR_DDRC1EN		BIT(0)
671 #define RCC_DDRITFCR_DDRC1LPEN		BIT(1)
672 #define RCC_DDRITFCR_DDRPHYCEN		BIT(4)
673 #define RCC_DDRITFCR_DDRPHYCLPEN	BIT(5)
674 #define RCC_DDRITFCR_DDRCAPBEN		BIT(6)
675 #define RCC_DDRITFCR_DDRCAPBLPEN	BIT(7)
676 #define RCC_DDRITFCR_AXIDCGEN		BIT(8)
677 #define RCC_DDRITFCR_DDRPHYCAPBEN	BIT(9)
678 #define RCC_DDRITFCR_DDRPHYCAPBLPEN	BIT(10)
680 #define RCC_DDRITFCR_DDRCAPBRST		BIT(14)
681 #define RCC_DDRITFCR_DDRCAXIRST		BIT(15)
682 #define RCC_DDRITFCR_DDRCORERST		BIT(16)
683 #define RCC_DDRITFCR_DPHYAPBRST		BIT(17)
684 #define RCC_DDRITFCR_DPHYRST		BIT(18)
685 #define RCC_DDRITFCR_DPHYCTLRST		BIT(19)
687 #define RCC_DDRITFCR_GSKPMOD		BIT(23)
688 #define RCC_DDRITFCR_GSKPCTRL		BIT(24)
798 #define RCC_USBCKSELR_USBOSRC		BIT(4)
826 #define RCC_APB1RSTSETR_TIM2RST		BIT(0)
827 #define RCC_APB1RSTSETR_TIM3RST		BIT(1)
828 #define RCC_APB1RSTSETR_TIM4RST		BIT(2)
829 #define RCC_APB1RSTSETR_TIM5RST		BIT(3)
830 #define RCC_APB1RSTSETR_TIM6RST		BIT(4)
831 #define RCC_APB1RSTSETR_TIM7RST		BIT(5)
832 #define RCC_APB1RSTSETR_LPTIM1RST	BIT(9)
833 #define RCC_APB1RSTSETR_SPI2RST		BIT(11)
834 #define RCC_APB1RSTSETR_SPI3RST		BIT(12)
835 #define RCC_APB1RSTSETR_USART3RST	BIT(15)
836 #define RCC_APB1RSTSETR_UART4RST	BIT(16)
837 #define RCC_APB1RSTSETR_UART5RST	BIT(17)
838 #define RCC_APB1RSTSETR_UART7RST	BIT(18)
839 #define RCC_APB1RSTSETR_UART8RST	BIT(19)
840 #define RCC_APB1RSTSETR_I2C1RST		BIT(21)
841 #define RCC_APB1RSTSETR_I2C2RST		BIT(22)
842 #define RCC_APB1RSTSETR_SPDIFRST	BIT(26)
845 #define RCC_APB1RSTCLRR_TIM2RST		BIT(0)
846 #define RCC_APB1RSTCLRR_TIM3RST		BIT(1)
847 #define RCC_APB1RSTCLRR_TIM4RST		BIT(2)
848 #define RCC_APB1RSTCLRR_TIM5RST		BIT(3)
849 #define RCC_APB1RSTCLRR_TIM6RST		BIT(4)
850 #define RCC_APB1RSTCLRR_TIM7RST		BIT(5)
851 #define RCC_APB1RSTCLRR_LPTIM1RST	BIT(9)
852 #define RCC_APB1RSTCLRR_SPI2RST		BIT(11)
853 #define RCC_APB1RSTCLRR_SPI3RST		BIT(12)
854 #define RCC_APB1RSTCLRR_USART3RST	BIT(15)
855 #define RCC_APB1RSTCLRR_UART4RST	BIT(16)
856 #define RCC_APB1RSTCLRR_UART5RST	BIT(17)
857 #define RCC_APB1RSTCLRR_UART7RST	BIT(18)
858 #define RCC_APB1RSTCLRR_UART8RST	BIT(19)
859 #define RCC_APB1RSTCLRR_I2C1RST		BIT(21)
860 #define RCC_APB1RSTCLRR_I2C2RST		BIT(22)
861 #define RCC_APB1RSTCLRR_SPDIFRST	BIT(26)
864 #define RCC_APB2RSTSETR_TIM1RST		BIT(0)
865 #define RCC_APB2RSTSETR_TIM8RST		BIT(1)
866 #define RCC_APB2RSTSETR_SPI1RST		BIT(8)
867 #define RCC_APB2RSTSETR_USART6RST	BIT(13)
868 #define RCC_APB2RSTSETR_SAI1RST		BIT(16)
869 #define RCC_APB2RSTSETR_SAI2RST		BIT(17)
870 #define RCC_APB2RSTSETR_DFSDMRST	BIT(20)
871 #define RCC_APB2RSTSETR_FDCANRST	BIT(24)
874 #define RCC_APB2RSTCLRR_TIM1RST		BIT(0)
875 #define RCC_APB2RSTCLRR_TIM8RST		BIT(1)
876 #define RCC_APB2RSTCLRR_SPI1RST		BIT(8)
877 #define RCC_APB2RSTCLRR_USART6RST	BIT(13)
878 #define RCC_APB2RSTCLRR_SAI1RST		BIT(16)
879 #define RCC_APB2RSTCLRR_SAI2RST		BIT(17)
880 #define RCC_APB2RSTCLRR_DFSDMRST	BIT(20)
881 #define RCC_APB2RSTCLRR_FDCANRST	BIT(24)
884 #define RCC_APB3RSTSETR_LPTIM2RST	BIT(0)
885 #define RCC_APB3RSTSETR_LPTIM3RST	BIT(1)
886 #define RCC_APB3RSTSETR_LPTIM4RST	BIT(2)
887 #define RCC_APB3RSTSETR_LPTIM5RST	BIT(3)
888 #define RCC_APB3RSTSETR_SYSCFGRST	BIT(11)
889 #define RCC_APB3RSTSETR_VREFRST		BIT(13)
890 #define RCC_APB3RSTSETR_DTSRST		BIT(16)
891 #define RCC_APB3RSTSETR_PMBCTRLRST	BIT(17)
894 #define RCC_APB3RSTCLRR_LPTIM2RST	BIT(0)
895 #define RCC_APB3RSTCLRR_LPTIM3RST	BIT(1)
896 #define RCC_APB3RSTCLRR_LPTIM4RST	BIT(2)
897 #define RCC_APB3RSTCLRR_LPTIM5RST	BIT(3)
898 #define RCC_APB3RSTCLRR_SYSCFGRST	BIT(11)
899 #define RCC_APB3RSTCLRR_VREFRST		BIT(13)
900 #define RCC_APB3RSTCLRR_DTSRST		BIT(16)
901 #define RCC_APB3RSTCLRR_PMBCTRLRST	BIT(17)
904 #define RCC_APB4RSTSETR_LTDCRST		BIT(0)
905 #define RCC_APB4RSTSETR_DCMIPPRST	BIT(1)
906 #define RCC_APB4RSTSETR_DDRPERFMRST	BIT(8)
907 #define RCC_APB4RSTSETR_USBPHYRST	BIT(16)
910 #define RCC_APB4RSTCLRR_LTDCRST		BIT(0)
911 #define RCC_APB4RSTCLRR_DCMIPPRST	BIT(1)
912 #define RCC_APB4RSTCLRR_DDRPERFMRST	BIT(8)
913 #define RCC_APB4RSTCLRR_USBPHYRST	BIT(16)
916 #define RCC_APB5RSTSETR_STGENRST	BIT(20)
919 #define RCC_APB5RSTCLRR_STGENRST	BIT(20)
922 #define RCC_APB6RSTSETR_USART1RST	BIT(0)
923 #define RCC_APB6RSTSETR_USART2RST	BIT(1)
924 #define RCC_APB6RSTSETR_SPI4RST		BIT(2)
925 #define RCC_APB6RSTSETR_SPI5RST		BIT(3)
926 #define RCC_APB6RSTSETR_I2C3RST		BIT(4)
927 #define RCC_APB6RSTSETR_I2C4RST		BIT(5)
928 #define RCC_APB6RSTSETR_I2C5RST		BIT(6)
929 #define RCC_APB6RSTSETR_TIM12RST	BIT(7)
930 #define RCC_APB6RSTSETR_TIM13RST	BIT(8)
931 #define RCC_APB6RSTSETR_TIM14RST	BIT(9)
932 #define RCC_APB6RSTSETR_TIM15RST	BIT(10)
933 #define RCC_APB6RSTSETR_TIM16RST	BIT(11)
934 #define RCC_APB6RSTSETR_TIM17RST	BIT(12)
937 #define RCC_APB6RSTCLRR_USART1RST	BIT(0)
938 #define RCC_APB6RSTCLRR_USART2RST	BIT(1)
939 #define RCC_APB6RSTCLRR_SPI4RST		BIT(2)
940 #define RCC_APB6RSTCLRR_SPI5RST		BIT(3)
941 #define RCC_APB6RSTCLRR_I2C3RST		BIT(4)
942 #define RCC_APB6RSTCLRR_I2C4RST		BIT(5)
943 #define RCC_APB6RSTCLRR_I2C5RST		BIT(6)
944 #define RCC_APB6RSTCLRR_TIM12RST	BIT(7)
945 #define RCC_APB6RSTCLRR_TIM13RST	BIT(8)
946 #define RCC_APB6RSTCLRR_TIM14RST	BIT(9)
947 #define RCC_APB6RSTCLRR_TIM15RST	BIT(10)
948 #define RCC_APB6RSTCLRR_TIM16RST	BIT(11)
949 #define RCC_APB6RSTCLRR_TIM17RST	BIT(12)
952 #define RCC_AHB2RSTSETR_DMA1RST		BIT(0)
953 #define RCC_AHB2RSTSETR_DMA2RST		BIT(1)
954 #define RCC_AHB2RSTSETR_DMAMUX1RST	BIT(2)
955 #define RCC_AHB2RSTSETR_DMA3RST		BIT(3)
956 #define RCC_AHB2RSTSETR_DMAMUX2RST	BIT(4)
957 #define RCC_AHB2RSTSETR_ADC1RST		BIT(5)
958 #define RCC_AHB2RSTSETR_ADC2RST		BIT(6)
959 #define RCC_AHB2RSTSETR_USBORST		BIT(8)
962 #define RCC_AHB2RSTCLRR_DMA1RST		BIT(0)
963 #define RCC_AHB2RSTCLRR_DMA2RST		BIT(1)
964 #define RCC_AHB2RSTCLRR_DMAMUX1RST	BIT(2)
965 #define RCC_AHB2RSTCLRR_DMA3RST		BIT(3)
966 #define RCC_AHB2RSTCLRR_DMAMUX2RST	BIT(4)
967 #define RCC_AHB2RSTCLRR_ADC1RST		BIT(5)
968 #define RCC_AHB2RSTCLRR_ADC2RST		BIT(6)
969 #define RCC_AHB2RSTCLRR_USBORST		BIT(8)
972 #define RCC_AHB4RSTSETR_GPIOARST	BIT(0)
973 #define RCC_AHB4RSTSETR_GPIOBRST	BIT(1)
974 #define RCC_AHB4RSTSETR_GPIOCRST	BIT(2)
975 #define RCC_AHB4RSTSETR_GPIODRST	BIT(3)
976 #define RCC_AHB4RSTSETR_GPIOERST	BIT(4)
977 #define RCC_AHB4RSTSETR_GPIOFRST	BIT(5)
978 #define RCC_AHB4RSTSETR_GPIOGRST	BIT(6)
979 #define RCC_AHB4RSTSETR_GPIOHRST	BIT(7)
980 #define RCC_AHB4RSTSETR_GPIOIRST	BIT(8)
981 #define RCC_AHB4RSTSETR_TSCRST		BIT(15)
984 #define RCC_AHB4RSTCLRR_GPIOARST	BIT(0)
985 #define RCC_AHB4RSTCLRR_GPIOBRST	BIT(1)
986 #define RCC_AHB4RSTCLRR_GPIOCRST	BIT(2)
987 #define RCC_AHB4RSTCLRR_GPIODRST	BIT(3)
988 #define RCC_AHB4RSTCLRR_GPIOERST	BIT(4)
989 #define RCC_AHB4RSTCLRR_GPIOFRST	BIT(5)
990 #define RCC_AHB4RSTCLRR_GPIOGRST	BIT(6)
991 #define RCC_AHB4RSTCLRR_GPIOHRST	BIT(7)
992 #define RCC_AHB4RSTCLRR_GPIOIRST	BIT(8)
993 #define RCC_AHB4RSTCLRR_TSCRST		BIT(15)
996 #define RCC_AHB5RSTSETR_PKARST		BIT(2)
997 #define RCC_AHB5RSTSETR_SAESRST		BIT(3)
998 #define RCC_AHB5RSTSETR_CRYP1RST	BIT(4)
999 #define RCC_AHB5RSTSETR_HASH1RST	BIT(5)
1000 #define RCC_AHB5RSTSETR_RNG1RST		BIT(6)
1001 #define RCC_AHB5RSTSETR_AXIMCRST	BIT(16)
1004 #define RCC_AHB5RSTCLRR_PKARST		BIT(2)
1005 #define RCC_AHB5RSTCLRR_SAESRST		BIT(3)
1006 #define RCC_AHB5RSTCLRR_CRYP1RST	BIT(4)
1007 #define RCC_AHB5RSTCLRR_HASH1RST	BIT(5)
1008 #define RCC_AHB5RSTCLRR_RNG1RST		BIT(6)
1009 #define RCC_AHB5RSTCLRR_AXIMCRST	BIT(16)
1012 #define RCC_AHB6RSTSETR_MDMARST		BIT(0)
1013 #define RCC_AHB6RSTSETR_MCERST		BIT(1)
1014 #define RCC_AHB6RSTSETR_ETH1MACRST	BIT(10)
1015 #define RCC_AHB6RSTSETR_FMCRST		BIT(12)
1016 #define RCC_AHB6RSTSETR_QSPIRST		BIT(14)
1017 #define RCC_AHB6RSTSETR_SDMMC1RST	BIT(16)
1018 #define RCC_AHB6RSTSETR_SDMMC2RST	BIT(17)
1019 #define RCC_AHB6RSTSETR_CRC1RST		BIT(20)
1020 #define RCC_AHB6RSTSETR_USBHRST		BIT(24)
1021 #define RCC_AHB6RSTSETR_ETH2MACRST	BIT(30)
1024 #define RCC_AHB6RSTCLRR_MDMARST		BIT(0)
1025 #define RCC_AHB6RSTCLRR_MCERST		BIT(1)
1026 #define RCC_AHB6RSTCLRR_ETH1MACRST	BIT(10)
1027 #define RCC_AHB6RSTCLRR_FMCRST		BIT(12)
1028 #define RCC_AHB6RSTCLRR_QSPIRST		BIT(14)
1029 #define RCC_AHB6RSTCLRR_SDMMC1RST	BIT(16)
1030 #define RCC_AHB6RSTCLRR_SDMMC2RST	BIT(17)
1031 #define RCC_AHB6RSTCLRR_CRC1RST		BIT(20)
1032 #define RCC_AHB6RSTCLRR_USBHRST		BIT(24)
1033 #define RCC_AHB6RSTCLRR_ETH2MACRST	BIT(30)
1036 #define RCC_MP_APB1ENSETR_TIM2EN	BIT(0)
1037 #define RCC_MP_APB1ENSETR_TIM3EN	BIT(1)
1038 #define RCC_MP_APB1ENSETR_TIM4EN	BIT(2)
1039 #define RCC_MP_APB1ENSETR_TIM5EN	BIT(3)
1040 #define RCC_MP_APB1ENSETR_TIM6EN	BIT(4)
1041 #define RCC_MP_APB1ENSETR_TIM7EN	BIT(5)
1042 #define RCC_MP_APB1ENSETR_LPTIM1EN	BIT(9)
1043 #define RCC_MP_APB1ENSETR_SPI2EN	BIT(11)
1044 #define RCC_MP_APB1ENSETR_SPI3EN	BIT(12)
1045 #define RCC_MP_APB1ENSETR_USART3EN	BIT(15)
1046 #define RCC_MP_APB1ENSETR_UART4EN	BIT(16)
1047 #define RCC_MP_APB1ENSETR_UART5EN	BIT(17)
1048 #define RCC_MP_APB1ENSETR_UART7EN	BIT(18)
1049 #define RCC_MP_APB1ENSETR_UART8EN	BIT(19)
1050 #define RCC_MP_APB1ENSETR_I2C1EN	BIT(21)
1051 #define RCC_MP_APB1ENSETR_I2C2EN	BIT(22)
1052 #define RCC_MP_APB1ENSETR_SPDIFEN	BIT(26)
1055 #define RCC_MP_APB1ENCLRR_TIM2EN	BIT(0)
1056 #define RCC_MP_APB1ENCLRR_TIM3EN	BIT(1)
1057 #define RCC_MP_APB1ENCLRR_TIM4EN	BIT(2)
1058 #define RCC_MP_APB1ENCLRR_TIM5EN	BIT(3)
1059 #define RCC_MP_APB1ENCLRR_TIM6EN	BIT(4)
1060 #define RCC_MP_APB1ENCLRR_TIM7EN	BIT(5)
1061 #define RCC_MP_APB1ENCLRR_LPTIM1EN	BIT(9)
1062 #define RCC_MP_APB1ENCLRR_SPI2EN	BIT(11)
1063 #define RCC_MP_APB1ENCLRR_SPI3EN	BIT(12)
1064 #define RCC_MP_APB1ENCLRR_USART3EN	BIT(15)
1065 #define RCC_MP_APB1ENCLRR_UART4EN	BIT(16)
1066 #define RCC_MP_APB1ENCLRR_UART5EN	BIT(17)
1067 #define RCC_MP_APB1ENCLRR_UART7EN	BIT(18)
1068 #define RCC_MP_APB1ENCLRR_UART8EN	BIT(19)
1069 #define RCC_MP_APB1ENCLRR_I2C1EN	BIT(21)
1070 #define RCC_MP_APB1ENCLRR_I2C2EN	BIT(22)
1071 #define RCC_MP_APB1ENCLRR_SPDIFEN	BIT(26)
1074 #define RCC_MP_APB2ENSETR_TIM1EN	BIT(0)
1075 #define RCC_MP_APB2ENSETR_TIM8EN	BIT(1)
1076 #define RCC_MP_APB2ENSETR_SPI1EN	BIT(8)
1077 #define RCC_MP_APB2ENSETR_USART6EN	BIT(13)
1078 #define RCC_MP_APB2ENSETR_SAI1EN	BIT(16)
1079 #define RCC_MP_APB2ENSETR_SAI2EN	BIT(17)
1080 #define RCC_MP_APB2ENSETR_DFSDMEN	BIT(20)
1081 #define RCC_MP_APB2ENSETR_ADFSDMEN	BIT(21)
1082 #define RCC_MP_APB2ENSETR_FDCANEN	BIT(24)
1085 #define RCC_MP_APB2ENCLRR_TIM1EN	BIT(0)
1086 #define RCC_MP_APB2ENCLRR_TIM8EN	BIT(1)
1087 #define RCC_MP_APB2ENCLRR_SPI1EN	BIT(8)
1088 #define RCC_MP_APB2ENCLRR_USART6EN	BIT(13)
1089 #define RCC_MP_APB2ENCLRR_SAI1EN	BIT(16)
1090 #define RCC_MP_APB2ENCLRR_SAI2EN	BIT(17)
1091 #define RCC_MP_APB2ENCLRR_DFSDMEN	BIT(20)
1092 #define RCC_MP_APB2ENCLRR_ADFSDMEN	BIT(21)
1093 #define RCC_MP_APB2ENCLRR_FDCANEN	BIT(24)
1096 #define RCC_MP_APB3ENSETR_LPTIM2EN	BIT(0)
1097 #define RCC_MP_APB3ENSETR_LPTIM3EN	BIT(1)
1098 #define RCC_MP_APB3ENSETR_LPTIM4EN	BIT(2)
1099 #define RCC_MP_APB3ENSETR_LPTIM5EN	BIT(3)
1100 #define RCC_MP_APB3ENSETR_VREFEN	BIT(13)
1101 #define RCC_MP_APB3ENSETR_DTSEN		BIT(16)
1102 #define RCC_MP_APB3ENSETR_PMBCTRLEN	BIT(17)
1103 #define RCC_MP_APB3ENSETR_HDPEN		BIT(20)
1106 #define RCC_MP_APB3ENCLRR_LPTIM2EN	BIT(0)
1107 #define RCC_MP_APB3ENCLRR_LPTIM3EN	BIT(1)
1108 #define RCC_MP_APB3ENCLRR_LPTIM4EN	BIT(2)
1109 #define RCC_MP_APB3ENCLRR_LPTIM5EN	BIT(3)
1110 #define RCC_MP_APB3ENCLRR_VREFEN	BIT(13)
1111 #define RCC_MP_APB3ENCLRR_DTSEN		BIT(16)
1112 #define RCC_MP_APB3ENCLRR_PMBCTRLEN	BIT(17)
1113 #define RCC_MP_APB3ENCLRR_HDPEN		BIT(20)
1116 #define RCC_MP_S_APB3ENSETR_SYSCFGEN	BIT(0)
1119 #define RCC_MP_S_APB3ENCLRR_SYSCFGEN	BIT(0)
1122 #define RCC_MP_NS_APB3ENSETR_SYSCFGEN	BIT(0)
1125 #define RCC_MP_NS_APB3ENCLRR_SYSCFGEN	BIT(0)
1128 #define RCC_MP_APB4ENSETR_DCMIPPEN	BIT(1)
1129 #define RCC_MP_APB4ENSETR_DDRPERFMEN	BIT(8)
1130 #define RCC_MP_APB4ENSETR_IWDG2APBEN	BIT(15)
1131 #define RCC_MP_APB4ENSETR_USBPHYEN	BIT(16)
1132 #define RCC_MP_APB4ENSETR_STGENROEN	BIT(20)
1135 #define RCC_MP_APB4ENCLRR_DCMIPPEN	BIT(1)
1136 #define RCC_MP_APB4ENCLRR_DDRPERFMEN	BIT(8)
1137 #define RCC_MP_APB4ENCLRR_IWDG2APBEN	BIT(15)
1138 #define RCC_MP_APB4ENCLRR_USBPHYEN	BIT(16)
1139 #define RCC_MP_APB4ENCLRR_STGENROEN	BIT(20)
1142 #define RCC_MP_S_APB4ENSETR_LTDCEN	BIT(0)
1145 #define RCC_MP_S_APB4ENCLRR_LTDCEN	BIT(0)
1148 #define RCC_MP_NS_APB4ENSETR_LTDCEN	BIT(0)
1151 #define RCC_MP_NS_APB4ENCLRR_LTDCEN	BIT(0)
1154 #define RCC_MP_APB5ENSETR_RTCAPBEN	BIT(8)
1155 #define RCC_MP_APB5ENSETR_TZCEN		BIT(11)
1156 #define RCC_MP_APB5ENSETR_ETZPCEN	BIT(13)
1157 #define RCC_MP_APB5ENSETR_IWDG1APBEN	BIT(15)
1158 #define RCC_MP_APB5ENSETR_BSECEN	BIT(16)
1159 #define RCC_MP_APB5ENSETR_STGENCEN	BIT(20)
1162 #define RCC_MP_APB5ENCLRR_RTCAPBEN	BIT(8)
1163 #define RCC_MP_APB5ENCLRR_TZCEN		BIT(11)
1164 #define RCC_MP_APB5ENCLRR_ETZPCEN	BIT(13)
1165 #define RCC_MP_APB5ENCLRR_IWDG1APBEN	BIT(15)
1166 #define RCC_MP_APB5ENCLRR_BSECEN	BIT(16)
1167 #define RCC_MP_APB5ENCLRR_STGENCEN	BIT(20)
1170 #define RCC_MP_APB6ENSETR_USART1EN	BIT(0)
1171 #define RCC_MP_APB6ENSETR_USART2EN	BIT(1)
1172 #define RCC_MP_APB6ENSETR_SPI4EN	BIT(2)
1173 #define RCC_MP_APB6ENSETR_SPI5EN	BIT(3)
1174 #define RCC_MP_APB6ENSETR_I2C3EN	BIT(4)
1175 #define RCC_MP_APB6ENSETR_I2C4EN	BIT(5)
1176 #define RCC_MP_APB6ENSETR_I2C5EN	BIT(6)
1177 #define RCC_MP_APB6ENSETR_TIM12EN	BIT(7)
1178 #define RCC_MP_APB6ENSETR_TIM13EN	BIT(8)
1179 #define RCC_MP_APB6ENSETR_TIM14EN	BIT(9)
1180 #define RCC_MP_APB6ENSETR_TIM15EN	BIT(10)
1181 #define RCC_MP_APB6ENSETR_TIM16EN	BIT(11)
1182 #define RCC_MP_APB6ENSETR_TIM17EN	BIT(12)
1185 #define RCC_MP_APB6ENCLRR_USART1EN	BIT(0)
1186 #define RCC_MP_APB6ENCLRR_USART2EN	BIT(1)
1187 #define RCC_MP_APB6ENCLRR_SPI4EN	BIT(2)
1188 #define RCC_MP_APB6ENCLRR_SPI5EN	BIT(3)
1189 #define RCC_MP_APB6ENCLRR_I2C3EN	BIT(4)
1190 #define RCC_MP_APB6ENCLRR_I2C4EN	BIT(5)
1191 #define RCC_MP_APB6ENCLRR_I2C5EN	BIT(6)
1192 #define RCC_MP_APB6ENCLRR_TIM12EN	BIT(7)
1193 #define RCC_MP_APB6ENCLRR_TIM13EN	BIT(8)
1194 #define RCC_MP_APB6ENCLRR_TIM14EN	BIT(9)
1195 #define RCC_MP_APB6ENCLRR_TIM15EN	BIT(10)
1196 #define RCC_MP_APB6ENCLRR_TIM16EN	BIT(11)
1197 #define RCC_MP_APB6ENCLRR_TIM17EN	BIT(12)
1200 #define RCC_MP_AHB2ENSETR_DMA1EN	BIT(0)
1201 #define RCC_MP_AHB2ENSETR_DMA2EN	BIT(1)
1202 #define RCC_MP_AHB2ENSETR_DMAMUX1EN	BIT(2)
1203 #define RCC_MP_AHB2ENSETR_DMA3EN	BIT(3)
1204 #define RCC_MP_AHB2ENSETR_DMAMUX2EN	BIT(4)
1205 #define RCC_MP_AHB2ENSETR_ADC1EN	BIT(5)
1206 #define RCC_MP_AHB2ENSETR_ADC2EN	BIT(6)
1207 #define RCC_MP_AHB2ENSETR_USBOEN	BIT(8)
1210 #define RCC_MP_AHB2ENCLRR_DMA1EN	BIT(0)
1211 #define RCC_MP_AHB2ENCLRR_DMA2EN	BIT(1)
1212 #define RCC_MP_AHB2ENCLRR_DMAMUX1EN	BIT(2)
1213 #define RCC_MP_AHB2ENCLRR_DMA3EN	BIT(3)
1214 #define RCC_MP_AHB2ENCLRR_DMAMUX2EN	BIT(4)
1215 #define RCC_MP_AHB2ENCLRR_ADC1EN	BIT(5)
1216 #define RCC_MP_AHB2ENCLRR_ADC2EN	BIT(6)
1217 #define RCC_MP_AHB2ENCLRR_USBOEN	BIT(8)
1220 #define RCC_MP_AHB4ENSETR_TSCEN		BIT(15)
1223 #define RCC_MP_AHB4ENCLRR_TSCEN		BIT(15)
1226 #define RCC_MP_S_AHB4ENSETR_GPIOAEN	BIT(0)
1227 #define RCC_MP_S_AHB4ENSETR_GPIOBEN	BIT(1)
1228 #define RCC_MP_S_AHB4ENSETR_GPIOCEN	BIT(2)
1229 #define RCC_MP_S_AHB4ENSETR_GPIODEN	BIT(3)
1230 #define RCC_MP_S_AHB4ENSETR_GPIOEEN	BIT(4)
1231 #define RCC_MP_S_AHB4ENSETR_GPIOFEN	BIT(5)
1232 #define RCC_MP_S_AHB4ENSETR_GPIOGEN	BIT(6)
1233 #define RCC_MP_S_AHB4ENSETR_GPIOHEN	BIT(7)
1234 #define RCC_MP_S_AHB4ENSETR_GPIOIEN	BIT(8)
1237 #define RCC_MP_S_AHB4ENCLRR_GPIOAEN	BIT(0)
1238 #define RCC_MP_S_AHB4ENCLRR_GPIOBEN	BIT(1)
1239 #define RCC_MP_S_AHB4ENCLRR_GPIOCEN	BIT(2)
1240 #define RCC_MP_S_AHB4ENCLRR_GPIODEN	BIT(3)
1241 #define RCC_MP_S_AHB4ENCLRR_GPIOEEN	BIT(4)
1242 #define RCC_MP_S_AHB4ENCLRR_GPIOFEN	BIT(5)
1243 #define RCC_MP_S_AHB4ENCLRR_GPIOGEN	BIT(6)
1244 #define RCC_MP_S_AHB4ENCLRR_GPIOHEN	BIT(7)
1245 #define RCC_MP_S_AHB4ENCLRR_GPIOIEN	BIT(8)
1248 #define RCC_MP_NS_AHB4ENSETR_GPIOAEN	BIT(0)
1249 #define RCC_MP_NS_AHB4ENSETR_GPIOBEN	BIT(1)
1250 #define RCC_MP_NS_AHB4ENSETR_GPIOCEN	BIT(2)
1251 #define RCC_MP_NS_AHB4ENSETR_GPIODEN	BIT(3)
1252 #define RCC_MP_NS_AHB4ENSETR_GPIOEEN	BIT(4)
1253 #define RCC_MP_NS_AHB4ENSETR_GPIOFEN	BIT(5)
1254 #define RCC_MP_NS_AHB4ENSETR_GPIOGEN	BIT(6)
1255 #define RCC_MP_NS_AHB4ENSETR_GPIOHEN	BIT(7)
1256 #define RCC_MP_NS_AHB4ENSETR_GPIOIEN	BIT(8)
1259 #define RCC_MP_NS_AHB4ENCLRR_GPIOAEN	BIT(0)
1260 #define RCC_MP_NS_AHB4ENCLRR_GPIOBEN	BIT(1)
1261 #define RCC_MP_NS_AHB4ENCLRR_GPIOCEN	BIT(2)
1262 #define RCC_MP_NS_AHB4ENCLRR_GPIODEN	BIT(3)
1263 #define RCC_MP_NS_AHB4ENCLRR_GPIOEEN	BIT(4)
1264 #define RCC_MP_NS_AHB4ENCLRR_GPIOFEN	BIT(5)
1265 #define RCC_MP_NS_AHB4ENCLRR_GPIOGEN	BIT(6)
1266 #define RCC_MP_NS_AHB4ENCLRR_GPIOHEN	BIT(7)
1267 #define RCC_MP_NS_AHB4ENCLRR_GPIOIEN	BIT(8)
1270 #define RCC_MP_AHB5ENSETR_PKAEN		BIT(2)
1271 #define RCC_MP_AHB5ENSETR_SAESEN	BIT(3)
1272 #define RCC_MP_AHB5ENSETR_CRYP1EN	BIT(4)
1273 #define RCC_MP_AHB5ENSETR_HASH1EN	BIT(5)
1274 #define RCC_MP_AHB5ENSETR_RNG1EN	BIT(6)
1275 #define RCC_MP_AHB5ENSETR_BKPSRAMEN	BIT(8)
1276 #define RCC_MP_AHB5ENSETR_AXIMCEN	BIT(16)
1279 #define RCC_MP_AHB5ENCLRR_PKAEN		BIT(2)
1280 #define RCC_MP_AHB5ENCLRR_SAESEN	BIT(3)
1281 #define RCC_MP_AHB5ENCLRR_CRYP1EN	BIT(4)
1282 #define RCC_MP_AHB5ENCLRR_HASH1EN	BIT(5)
1283 #define RCC_MP_AHB5ENCLRR_RNG1EN	BIT(6)
1284 #define RCC_MP_AHB5ENCLRR_BKPSRAMEN	BIT(8)
1285 #define RCC_MP_AHB5ENCLRR_AXIMCEN	BIT(16)
1288 #define RCC_MP_AHB6ENSETR_MCEEN		BIT(1)
1289 #define RCC_MP_AHB6ENSETR_ETH1CKEN	BIT(7)
1290 #define RCC_MP_AHB6ENSETR_ETH1TXEN	BIT(8)
1291 #define RCC_MP_AHB6ENSETR_ETH1RXEN	BIT(9)
1292 #define RCC_MP_AHB6ENSETR_ETH1MACEN	BIT(10)
1293 #define RCC_MP_AHB6ENSETR_FMCEN		BIT(12)
1294 #define RCC_MP_AHB6ENSETR_QSPIEN	BIT(14)
1295 #define RCC_MP_AHB6ENSETR_SDMMC1EN	BIT(16)
1296 #define RCC_MP_AHB6ENSETR_SDMMC2EN	BIT(17)
1297 #define RCC_MP_AHB6ENSETR_CRC1EN	BIT(20)
1298 #define RCC_MP_AHB6ENSETR_USBHEN	BIT(24)
1299 #define RCC_MP_AHB6ENSETR_ETH2CKEN	BIT(27)
1300 #define RCC_MP_AHB6ENSETR_ETH2TXEN	BIT(28)
1301 #define RCC_MP_AHB6ENSETR_ETH2RXEN	BIT(29)
1302 #define RCC_MP_AHB6ENSETR_ETH2MACEN	BIT(30)
1305 #define RCC_MP_AHB6ENCLRR_MCEEN		BIT(1)
1306 #define RCC_MP_AHB6ENCLRR_ETH1CKEN	BIT(7)
1307 #define RCC_MP_AHB6ENCLRR_ETH1TXEN	BIT(8)
1308 #define RCC_MP_AHB6ENCLRR_ETH1RXEN	BIT(9)
1309 #define RCC_MP_AHB6ENCLRR_ETH1MACEN	BIT(10)
1310 #define RCC_MP_AHB6ENCLRR_FMCEN		BIT(12)
1311 #define RCC_MP_AHB6ENCLRR_QSPIEN	BIT(14)
1312 #define RCC_MP_AHB6ENCLRR_SDMMC1EN	BIT(16)
1313 #define RCC_MP_AHB6ENCLRR_SDMMC2EN	BIT(17)
1314 #define RCC_MP_AHB6ENCLRR_CRC1EN	BIT(20)
1315 #define RCC_MP_AHB6ENCLRR_USBHEN	BIT(24)
1316 #define RCC_MP_AHB6ENCLRR_ETH2CKEN	BIT(27)
1317 #define RCC_MP_AHB6ENCLRR_ETH2TXEN	BIT(28)
1318 #define RCC_MP_AHB6ENCLRR_ETH2RXEN	BIT(29)
1319 #define RCC_MP_AHB6ENCLRR_ETH2MACEN	BIT(30)
1322 #define RCC_MP_S_AHB6ENSETR_MDMAEN	BIT(0)
1325 #define RCC_MP_S_AHB6ENCLRR_MDMAEN	BIT(0)
1328 #define RCC_MP_NS_AHB6ENSETR_MDMAEN	BIT(0)
1331 #define RCC_MP_NS_AHB6ENCLRR_MDMAEN	BIT(0)
1334 #define RCC_MP_APB1LPENSETR_TIM2LPEN	BIT(0)
1335 #define RCC_MP_APB1LPENSETR_TIM3LPEN	BIT(1)
1336 #define RCC_MP_APB1LPENSETR_TIM4LPEN	BIT(2)
1337 #define RCC_MP_APB1LPENSETR_TIM5LPEN	BIT(3)
1338 #define RCC_MP_APB1LPENSETR_TIM6LPEN	BIT(4)
1339 #define RCC_MP_APB1LPENSETR_TIM7LPEN	BIT(5)
1340 #define RCC_MP_APB1LPENSETR_LPTIM1LPEN	BIT(9)
1341 #define RCC_MP_APB1LPENSETR_SPI2LPEN	BIT(11)
1342 #define RCC_MP_APB1LPENSETR_SPI3LPEN	BIT(12)
1343 #define RCC_MP_APB1LPENSETR_USART3LPEN	BIT(15)
1344 #define RCC_MP_APB1LPENSETR_UART4LPEN	BIT(16)
1345 #define RCC_MP_APB1LPENSETR_UART5LPEN	BIT(17)
1346 #define RCC_MP_APB1LPENSETR_UART7LPEN	BIT(18)
1347 #define RCC_MP_APB1LPENSETR_UART8LPEN	BIT(19)
1348 #define RCC_MP_APB1LPENSETR_I2C1LPEN	BIT(21)
1349 #define RCC_MP_APB1LPENSETR_I2C2LPEN	BIT(22)
1350 #define RCC_MP_APB1LPENSETR_SPDIFLPEN	BIT(26)
1353 #define RCC_MP_APB1LPENCLRR_TIM2LPEN	BIT(0)
1354 #define RCC_MP_APB1LPENCLRR_TIM3LPEN	BIT(1)
1355 #define RCC_MP_APB1LPENCLRR_TIM4LPEN	BIT(2)
1356 #define RCC_MP_APB1LPENCLRR_TIM5LPEN	BIT(3)
1357 #define RCC_MP_APB1LPENCLRR_TIM6LPEN	BIT(4)
1358 #define RCC_MP_APB1LPENCLRR_TIM7LPEN	BIT(5)
1359 #define RCC_MP_APB1LPENCLRR_LPTIM1LPEN	BIT(9)
1360 #define RCC_MP_APB1LPENCLRR_SPI2LPEN	BIT(11)
1361 #define RCC_MP_APB1LPENCLRR_SPI3LPEN	BIT(12)
1362 #define RCC_MP_APB1LPENCLRR_USART3LPEN	BIT(15)
1363 #define RCC_MP_APB1LPENCLRR_UART4LPEN	BIT(16)
1364 #define RCC_MP_APB1LPENCLRR_UART5LPEN	BIT(17)
1365 #define RCC_MP_APB1LPENCLRR_UART7LPEN	BIT(18)
1366 #define RCC_MP_APB1LPENCLRR_UART8LPEN	BIT(19)
1367 #define RCC_MP_APB1LPENCLRR_I2C1LPEN	BIT(21)
1368 #define RCC_MP_APB1LPENCLRR_I2C2LPEN	BIT(22)
1369 #define RCC_MP_APB1LPENCLRR_SPDIFLPEN	BIT(26)
1372 #define RCC_MP_APB2LPENSETR_TIM1LPEN	BIT(0)
1373 #define RCC_MP_APB2LPENSETR_TIM8LPEN	BIT(1)
1374 #define RCC_MP_APB2LPENSETR_SPI1LPEN	BIT(8)
1375 #define RCC_MP_APB2LPENSETR_USART6LPEN	BIT(13)
1376 #define RCC_MP_APB2LPENSETR_SAI1LPEN	BIT(16)
1377 #define RCC_MP_APB2LPENSETR_SAI2LPEN	BIT(17)
1378 #define RCC_MP_APB2LPENSETR_DFSDMLPEN	BIT(20)
1379 #define RCC_MP_APB2LPENSETR_ADFSDMLPEN	BIT(21)
1380 #define RCC_MP_APB2LPENSETR_FDCANLPEN	BIT(24)
1383 #define RCC_MP_APB2LPENCLRR_TIM1LPEN	BIT(0)
1384 #define RCC_MP_APB2LPENCLRR_TIM8LPEN	BIT(1)
1385 #define RCC_MP_APB2LPENCLRR_SPI1LPEN	BIT(8)
1386 #define RCC_MP_APB2LPENCLRR_USART6LPEN	BIT(13)
1387 #define RCC_MP_APB2LPENCLRR_SAI1LPEN	BIT(16)
1388 #define RCC_MP_APB2LPENCLRR_SAI2LPEN	BIT(17)
1389 #define RCC_MP_APB2LPENCLRR_DFSDMLPEN	BIT(20)
1390 #define RCC_MP_APB2LPENCLRR_ADFSDMLPEN	BIT(21)
1391 #define RCC_MP_APB2LPENCLRR_FDCANLPEN	BIT(24)
1394 #define RCC_MP_APB3LPENSETR_LPTIM2LPEN	BIT(0)
1395 #define RCC_MP_APB3LPENSETR_LPTIM3LPEN	BIT(1)
1396 #define RCC_MP_APB3LPENSETR_LPTIM4LPEN	BIT(2)
1397 #define RCC_MP_APB3LPENSETR_LPTIM5LPEN	BIT(3)
1398 #define RCC_MP_APB3LPENSETR_VREFLPEN	BIT(13)
1399 #define RCC_MP_APB3LPENSETR_DTSLPEN	BIT(16)
1400 #define RCC_MP_APB3LPENSETR_PMBCTRLLPEN	BIT(17)
1403 #define RCC_MP_APB3LPENCLRR_LPTIM2LPEN	BIT(0)
1404 #define RCC_MP_APB3LPENCLRR_LPTIM3LPEN	BIT(1)
1405 #define RCC_MP_APB3LPENCLRR_LPTIM4LPEN	BIT(2)
1406 #define RCC_MP_APB3LPENCLRR_LPTIM5LPEN	BIT(3)
1407 #define RCC_MP_APB3LPENCLRR_VREFLPEN	BIT(13)
1408 #define RCC_MP_APB3LPENCLRR_DTSLPEN	BIT(16)
1409 #define RCC_MP_APB3LPENCLRR_PMBCTRLLPEN	BIT(17)
1412 #define RCC_MP_S_APB3LPENSETR_SYSCFGLPEN	BIT(0)
1415 #define RCC_MP_S_APB3LPENCLRR_SYSCFGLPEN	BIT(0)
1418 #define RCC_MP_NS_APB3LPENSETR_SYSCFGLPEN	BIT(0)
1421 #define RCC_MP_NS_APB3LPENCLRR_SYSCFGLPEN	BIT(0)
1424 #define RCC_MP_APB4LPENSETR_DCMIPPLPEN		BIT(1)
1425 #define RCC_MP_APB4LPENSETR_DDRPERFMLPEN	BIT(8)
1426 #define RCC_MP_APB4LPENSETR_IWDG2APBLPEN	BIT(15)
1427 #define RCC_MP_APB4LPENSETR_USBPHYLPEN		BIT(16)
1428 #define RCC_MP_APB4LPENSETR_STGENROLPEN		BIT(20)
1429 #define RCC_MP_APB4LPENSETR_STGENROSTPEN	BIT(21)
1432 #define RCC_MP_APB4LPENCLRR_DCMIPPLPEN		BIT(1)
1433 #define RCC_MP_APB4LPENCLRR_DDRPERFMLPEN	BIT(8)
1434 #define RCC_MP_APB4LPENCLRR_IWDG2APBLPEN	BIT(15)
1435 #define RCC_MP_APB4LPENCLRR_USBPHYLPEN		BIT(16)
1436 #define RCC_MP_APB4LPENCLRR_STGENROLPEN		BIT(20)
1437 #define RCC_MP_APB4LPENCLRR_STGENROSTPEN	BIT(21)
1440 #define RCC_MP_S_APB4LPENSETR_LTDCLPEN	BIT(0)
1443 #define RCC_MP_S_APB4LPENCLRR_LTDCLPEN	BIT(0)
1446 #define RCC_MP_NS_APB4LPENSETR_LTDCLPEN	BIT(0)
1449 #define RCC_MP_NS_APB4LPENCLRR_LTDCLPEN	BIT(0)
1452 #define RCC_MP_APB5LPENSETR_RTCAPBLPEN		BIT(8)
1453 #define RCC_MP_APB5LPENSETR_TZCLPEN		BIT(11)
1454 #define RCC_MP_APB5LPENSETR_ETZPCLPEN		BIT(13)
1455 #define RCC_MP_APB5LPENSETR_IWDG1APBLPEN	BIT(15)
1456 #define RCC_MP_APB5LPENSETR_BSECLPEN		BIT(16)
1457 #define RCC_MP_APB5LPENSETR_STGENCLPEN		BIT(20)
1458 #define RCC_MP_APB5LPENSETR_STGENCSTPEN		BIT(21)
1461 #define RCC_MP_APB5LPENCLRR_RTCAPBLPEN		BIT(8)
1462 #define RCC_MP_APB5LPENCLRR_TZCLPEN		BIT(11)
1463 #define RCC_MP_APB5LPENCLRR_ETZPCLPEN		BIT(13)
1464 #define RCC_MP_APB5LPENCLRR_IWDG1APBLPEN	BIT(15)
1465 #define RCC_MP_APB5LPENCLRR_BSECLPEN		BIT(16)
1466 #define RCC_MP_APB5LPENCLRR_STGENCLPEN		BIT(20)
1467 #define RCC_MP_APB5LPENCLRR_STGENCSTPEN		BIT(21)
1470 #define RCC_MP_APB6LPENSETR_USART1LPEN	BIT(0)
1471 #define RCC_MP_APB6LPENSETR_USART2LPEN	BIT(1)
1472 #define RCC_MP_APB6LPENSETR_SPI4LPEN	BIT(2)
1473 #define RCC_MP_APB6LPENSETR_SPI5LPEN	BIT(3)
1474 #define RCC_MP_APB6LPENSETR_I2C3LPEN	BIT(4)
1475 #define RCC_MP_APB6LPENSETR_I2C4LPEN	BIT(5)
1476 #define RCC_MP_APB6LPENSETR_I2C5LPEN	BIT(6)
1477 #define RCC_MP_APB6LPENSETR_TIM12LPEN	BIT(7)
1478 #define RCC_MP_APB6LPENSETR_TIM13LPEN	BIT(8)
1479 #define RCC_MP_APB6LPENSETR_TIM14LPEN	BIT(9)
1480 #define RCC_MP_APB6LPENSETR_TIM15LPEN	BIT(10)
1481 #define RCC_MP_APB6LPENSETR_TIM16LPEN	BIT(11)
1482 #define RCC_MP_APB6LPENSETR_TIM17LPEN	BIT(12)
1485 #define RCC_MP_APB6LPENCLRR_USART1LPEN	BIT(0)
1486 #define RCC_MP_APB6LPENCLRR_USART2LPEN	BIT(1)
1487 #define RCC_MP_APB6LPENCLRR_SPI4LPEN	BIT(2)
1488 #define RCC_MP_APB6LPENCLRR_SPI5LPEN	BIT(3)
1489 #define RCC_MP_APB6LPENCLRR_I2C3LPEN	BIT(4)
1490 #define RCC_MP_APB6LPENCLRR_I2C4LPEN	BIT(5)
1491 #define RCC_MP_APB6LPENCLRR_I2C5LPEN	BIT(6)
1492 #define RCC_MP_APB6LPENCLRR_TIM12LPEN	BIT(7)
1493 #define RCC_MP_APB6LPENCLRR_TIM13LPEN	BIT(8)
1494 #define RCC_MP_APB6LPENCLRR_TIM14LPEN	BIT(9)
1495 #define RCC_MP_APB6LPENCLRR_TIM15LPEN	BIT(10)
1496 #define RCC_MP_APB6LPENCLRR_TIM16LPEN	BIT(11)
1497 #define RCC_MP_APB6LPENCLRR_TIM17LPEN	BIT(12)
1500 #define RCC_MP_AHB2LPENSETR_DMA1LPEN	BIT(0)
1501 #define RCC_MP_AHB2LPENSETR_DMA2LPEN	BIT(1)
1502 #define RCC_MP_AHB2LPENSETR_DMAMUX1LPEN	BIT(2)
1503 #define RCC_MP_AHB2LPENSETR_DMA3LPEN	BIT(3)
1504 #define RCC_MP_AHB2LPENSETR_DMAMUX2LPEN	BIT(4)
1505 #define RCC_MP_AHB2LPENSETR_ADC1LPEN	BIT(5)
1506 #define RCC_MP_AHB2LPENSETR_ADC2LPEN	BIT(6)
1507 #define RCC_MP_AHB2LPENSETR_USBOLPEN	BIT(8)
1510 #define RCC_MP_AHB2LPENCLRR_DMA1LPEN	BIT(0)
1511 #define RCC_MP_AHB2LPENCLRR_DMA2LPEN	BIT(1)
1512 #define RCC_MP_AHB2LPENCLRR_DMAMUX1LPEN	BIT(2)
1513 #define RCC_MP_AHB2LPENCLRR_DMA3LPEN	BIT(3)
1514 #define RCC_MP_AHB2LPENCLRR_DMAMUX2LPEN	BIT(4)
1515 #define RCC_MP_AHB2LPENCLRR_ADC1LPEN	BIT(5)
1516 #define RCC_MP_AHB2LPENCLRR_ADC2LPEN	BIT(6)
1517 #define RCC_MP_AHB2LPENCLRR_USBOLPEN	BIT(8)
1520 #define RCC_MP_AHB4LPENSETR_TSCLPEN	BIT(15)
1523 #define RCC_MP_AHB4LPENCLRR_TSCLPEN	BIT(15)
1526 #define RCC_MP_S_AHB4LPENSETR_GPIOALPEN	BIT(0)
1527 #define RCC_MP_S_AHB4LPENSETR_GPIOBLPEN	BIT(1)
1528 #define RCC_MP_S_AHB4LPENSETR_GPIOCLPEN	BIT(2)
1529 #define RCC_MP_S_AHB4LPENSETR_GPIODLPEN	BIT(3)
1530 #define RCC_MP_S_AHB4LPENSETR_GPIOELPEN	BIT(4)
1531 #define RCC_MP_S_AHB4LPENSETR_GPIOFLPEN	BIT(5)
1532 #define RCC_MP_S_AHB4LPENSETR_GPIOGLPEN	BIT(6)
1533 #define RCC_MP_S_AHB4LPENSETR_GPIOHLPEN	BIT(7)
1534 #define RCC_MP_S_AHB4LPENSETR_GPIOILPEN	BIT(8)
1537 #define RCC_MP_S_AHB4LPENCLRR_GPIOALPEN	BIT(0)
1538 #define RCC_MP_S_AHB4LPENCLRR_GPIOBLPEN	BIT(1)
1539 #define RCC_MP_S_AHB4LPENCLRR_GPIOCLPEN	BIT(2)
1540 #define RCC_MP_S_AHB4LPENCLRR_GPIODLPEN	BIT(3)
1541 #define RCC_MP_S_AHB4LPENCLRR_GPIOELPEN	BIT(4)
1542 #define RCC_MP_S_AHB4LPENCLRR_GPIOFLPEN	BIT(5)
1543 #define RCC_MP_S_AHB4LPENCLRR_GPIOGLPEN	BIT(6)
1544 #define RCC_MP_S_AHB4LPENCLRR_GPIOHLPEN	BIT(7)
1545 #define RCC_MP_S_AHB4LPENCLRR_GPIOILPEN	BIT(8)
1548 #define RCC_MP_NS_AHB4LPENSETR_GPIOALPEN BIT(0)
1549 #define RCC_MP_NS_AHB4LPENSETR_GPIOBLPEN BIT(1)
1550 #define RCC_MP_NS_AHB4LPENSETR_GPIOCLPEN BIT(2)
1551 #define RCC_MP_NS_AHB4LPENSETR_GPIODLPEN BIT(3)
1552 #define RCC_MP_NS_AHB4LPENSETR_GPIOELPEN BIT(4)
1553 #define RCC_MP_NS_AHB4LPENSETR_GPIOFLPEN BIT(5)
1554 #define RCC_MP_NS_AHB4LPENSETR_GPIOGLPEN BIT(6)
1555 #define RCC_MP_NS_AHB4LPENSETR_GPIOHLPEN BIT(7)
1556 #define RCC_MP_NS_AHB4LPENSETR_GPIOILPEN BIT(8)
1559 #define RCC_MP_NS_AHB4LPENCLRR_GPIOALPEN BIT(0)
1560 #define RCC_MP_NS_AHB4LPENCLRR_GPIOBLPEN BIT(1)
1561 #define RCC_MP_NS_AHB4LPENCLRR_GPIOCLPEN BIT(2)
1562 #define RCC_MP_NS_AHB4LPENCLRR_GPIODLPEN BIT(3)
1563 #define RCC_MP_NS_AHB4LPENCLRR_GPIOELPEN BIT(4)
1564 #define RCC_MP_NS_AHB4LPENCLRR_GPIOFLPEN BIT(5)
1565 #define RCC_MP_NS_AHB4LPENCLRR_GPIOGLPEN BIT(6)
1566 #define RCC_MP_NS_AHB4LPENCLRR_GPIOHLPEN BIT(7)
1567 #define RCC_MP_NS_AHB4LPENCLRR_GPIOILPEN BIT(8)
1570 #define RCC_MP_AHB5LPENSETR_PKALPEN	BIT(2)
1571 #define RCC_MP_AHB5LPENSETR_SAESLPEN	BIT(3)
1572 #define RCC_MP_AHB5LPENSETR_CRYP1LPEN	BIT(4)
1573 #define RCC_MP_AHB5LPENSETR_HASH1LPEN	BIT(5)
1574 #define RCC_MP_AHB5LPENSETR_RNG1LPEN	BIT(6)
1575 #define RCC_MP_AHB5LPENSETR_BKPSRAMLPEN	BIT(8)
1578 #define RCC_MP_AHB5LPENCLRR_PKALPEN	BIT(2)
1579 #define RCC_MP_AHB5LPENCLRR_SAESLPEN	BIT(3)
1580 #define RCC_MP_AHB5LPENCLRR_CRYP1LPEN	BIT(4)
1581 #define RCC_MP_AHB5LPENCLRR_HASH1LPEN	BIT(5)
1582 #define RCC_MP_AHB5LPENCLRR_RNG1LPEN	BIT(6)
1583 #define RCC_MP_AHB5LPENCLRR_BKPSRAMLPEN	BIT(8)
1586 #define RCC_MP_AHB6LPENSETR_MCELPEN	BIT(1)
1587 #define RCC_MP_AHB6LPENSETR_ETH1CKLPEN	BIT(7)
1588 #define RCC_MP_AHB6LPENSETR_ETH1TXLPEN	BIT(8)
1589 #define RCC_MP_AHB6LPENSETR_ETH1RXLPEN	BIT(9)
1590 #define RCC_MP_AHB6LPENSETR_ETH1MACLPEN	BIT(10)
1591 #define RCC_MP_AHB6LPENSETR_ETH1STPEN	BIT(11)
1592 #define RCC_MP_AHB6LPENSETR_FMCLPEN	BIT(12)
1593 #define RCC_MP_AHB6LPENSETR_QSPILPEN	BIT(14)
1594 #define RCC_MP_AHB6LPENSETR_SDMMC1LPEN	BIT(16)
1595 #define RCC_MP_AHB6LPENSETR_SDMMC2LPEN	BIT(17)
1596 #define RCC_MP_AHB6LPENSETR_CRC1LPEN	BIT(20)
1597 #define RCC_MP_AHB6LPENSETR_USBHLPEN	BIT(24)
1598 #define RCC_MP_AHB6LPENSETR_ETH2CKLPEN	BIT(27)
1599 #define RCC_MP_AHB6LPENSETR_ETH2TXLPEN	BIT(28)
1600 #define RCC_MP_AHB6LPENSETR_ETH2RXLPEN	BIT(29)
1601 #define RCC_MP_AHB6LPENSETR_ETH2MACLPEN	BIT(30)
1602 #define RCC_MP_AHB6LPENSETR_ETH2STPEN	BIT(31)
1605 #define RCC_MP_AHB6LPENCLRR_MCELPEN	BIT(1)
1606 #define RCC_MP_AHB6LPENCLRR_ETH1CKLPEN	BIT(7)
1607 #define RCC_MP_AHB6LPENCLRR_ETH1TXLPEN	BIT(8)
1608 #define RCC_MP_AHB6LPENCLRR_ETH1RXLPEN	BIT(9)
1609 #define RCC_MP_AHB6LPENCLRR_ETH1MACLPEN	BIT(10)
1610 #define RCC_MP_AHB6LPENCLRR_ETH1STPEN	BIT(11)
1611 #define RCC_MP_AHB6LPENCLRR_FMCLPEN	BIT(12)
1612 #define RCC_MP_AHB6LPENCLRR_QSPILPEN	BIT(14)
1613 #define RCC_MP_AHB6LPENCLRR_SDMMC1LPEN	BIT(16)
1614 #define RCC_MP_AHB6LPENCLRR_SDMMC2LPEN	BIT(17)
1615 #define RCC_MP_AHB6LPENCLRR_CRC1LPEN	BIT(20)
1616 #define RCC_MP_AHB6LPENCLRR_USBHLPEN	BIT(24)
1617 #define RCC_MP_AHB6LPENCLRR_ETH2CKLPEN	BIT(27)
1618 #define RCC_MP_AHB6LPENCLRR_ETH2TXLPEN	BIT(28)
1619 #define RCC_MP_AHB6LPENCLRR_ETH2RXLPEN	BIT(29)
1620 #define RCC_MP_AHB6LPENCLRR_ETH2MACLPEN	BIT(30)
1621 #define RCC_MP_AHB6LPENCLRR_ETH2STPEN	BIT(31)
1624 #define RCC_MP_S_AHB6LPENSETR_MDMALPEN	BIT(0)
1627 #define RCC_MP_S_AHB6LPENCLRR_MDMALPEN	BIT(0)
1630 #define RCC_MP_NS_AHB6LPENSETR_MDMALPEN	BIT(0)
1633 #define RCC_MP_NS_AHB6LPENCLRR_MDMALPEN	BIT(0)
1636 #define RCC_MP_S_AXIMLPENSETR_SYSRAMLPEN BIT(0)
1639 #define RCC_MP_S_AXIMLPENCLRR_SYSRAMLPEN BIT(0)
1642 #define RCC_MP_NS_AXIMLPENSETR_SYSRAMLPEN BIT(0)
1645 #define RCC_MP_NS_AXIMLPENCLRR_SYSRAMLPEN BIT(0)
1648 #define RCC_MP_MLAHBLPENSETR_SRAM1LPEN	BIT(0)
1649 #define RCC_MP_MLAHBLPENSETR_SRAM2LPEN	BIT(1)
1650 #define RCC_MP_MLAHBLPENSETR_SRAM3LPEN	BIT(2)
1653 #define RCC_MP_MLAHBLPENCLRR_SRAM1LPEN	BIT(0)
1654 #define RCC_MP_MLAHBLPENCLRR_SRAM2LPEN	BIT(1)
1655 #define RCC_MP_MLAHBLPENCLRR_SRAM3LPEN	BIT(2)
1664 #define RCC_APB4SECSR_USBPHYSECF	16
1671 #define RCC_APB5SECSR_BSECSECF		16
1713 #define RCC_AHB6SECSR_SDMMC1SECF	16