Lines Matching refs:CFG_MUX
361 #define CFG_MUX(_id, _offset, _shift, _witdh)\ macro
368 CFG_MUX(MUX_I2C12, RCC_I2C12CKSELR, 0, 3),
369 CFG_MUX(MUX_LPTIM45, RCC_LPTIM45CKSELR, 0, 3),
370 CFG_MUX(MUX_SPI23, RCC_SPI2S23CKSELR, 0, 3),
371 CFG_MUX(MUX_UART35, RCC_UART35CKSELR, 0, 3),
372 CFG_MUX(MUX_UART78, RCC_UART78CKSELR, 0, 3),
373 CFG_MUX(MUX_ADC1, RCC_ADC12CKSELR, 0, 2),
374 CFG_MUX(MUX_ADC2, RCC_ADC12CKSELR, 2, 2),
375 CFG_MUX(MUX_DCMIPP, RCC_DCMIPPCKSELR, 0, 2),
376 CFG_MUX(MUX_ETH1, RCC_ETH12CKSELR, 0, 2),
377 CFG_MUX(MUX_ETH2, RCC_ETH12CKSELR, 8, 2),
378 CFG_MUX(MUX_FDCAN, RCC_FDCANCKSELR, 0, 2),
379 CFG_MUX(MUX_I2C3, RCC_I2C345CKSELR, 0, 3),
380 CFG_MUX(MUX_I2C4, RCC_I2C345CKSELR, 3, 3),
381 CFG_MUX(MUX_I2C5, RCC_I2C345CKSELR, 6, 3),
382 CFG_MUX(MUX_LPTIM1, RCC_LPTIM1CKSELR, 0, 3),
383 CFG_MUX(MUX_LPTIM2, RCC_LPTIM23CKSELR, 0, 3),
384 CFG_MUX(MUX_LPTIM3, RCC_LPTIM23CKSELR, 3, 3),
385 CFG_MUX(MUX_MCO1, RCC_MCO1CFGR, 0, 3),
386 CFG_MUX(MUX_MCO2, RCC_MCO2CFGR, 0, 3),
387 CFG_MUX(MUX_RNG1, RCC_RNG1CKSELR, 0, 2),
388 CFG_MUX(MUX_SAES, RCC_SAESCKSELR, 0, 2),
389 CFG_MUX(MUX_SAI1, RCC_SAI1CKSELR, 0, 3),
390 CFG_MUX(MUX_SAI2, RCC_SAI2CKSELR, 0, 3),
391 CFG_MUX(MUX_SPDIF, RCC_SPDIFCKSELR, 0, 2),
392 CFG_MUX(MUX_SPI1, RCC_SPI2S1CKSELR, 0, 3),
393 CFG_MUX(MUX_SPI4, RCC_SPI45CKSELR, 0, 3),
394 CFG_MUX(MUX_SPI5, RCC_SPI45CKSELR, 3, 3),
395 CFG_MUX(MUX_STGEN, RCC_STGENCKSELR, 0, 2),
396 CFG_MUX(MUX_UART1, RCC_UART12CKSELR, 0, 3),
397 CFG_MUX(MUX_UART2, RCC_UART12CKSELR, 3, 3),
398 CFG_MUX(MUX_UART4, RCC_UART4CKSELR, 0, 3),
399 CFG_MUX(MUX_UART6, RCC_UART6CKSELR, 0, 3),
400 CFG_MUX(MUX_USBO, RCC_USBCKSELR, 4, 1),
401 CFG_MUX(MUX_USBPHY, RCC_USBCKSELR, 0, 2),