402 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_set_rate()  local
406 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_set_rate()
409 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_set_rate()
411 	ret = stm32_divider_set_rate(composite->base, composite->clock_data,  in clk_stm32_composite_set_rate()
412 				     composite->div_id, rate, parent_rate);  in clk_stm32_composite_set_rate()
414 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_set_rate()
422 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_recalc_rate()  local
424 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_recalc_rate()
427 	return stm32_divider_get_rate(composite->base, composite->clock_data,  in clk_stm32_composite_recalc_rate()
428 				      composite->div_id, parent_rate);  in clk_stm32_composite_recalc_rate()
434 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_determine_rate()  local
438 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_determine_rate()
441 	divider = &composite->clock_data->dividers[composite->div_id];  in clk_stm32_composite_determine_rate()
447 		val =  readl(composite->base + divider->offset) >> divider->shift;  in clk_stm32_composite_determine_rate()
472 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_get_parent()  local
474 	return stm32_mux_get_parent(composite->base, composite->clock_data, composite->mux_id);  in clk_stm32_composite_get_parent()
479 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_set_parent()  local
482 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_set_parent()
484 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, index);  in clk_stm32_composite_set_parent()
486 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_set_parent()
488 	if (composite->clock_data->is_multi_mux) {  in clk_stm32_composite_set_parent()
489 		struct clk_hw *other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_composite_set_parent()
503 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_is_enabled()  local
505 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_is_enabled()
508 	return stm32_gate_is_enabled(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_is_enabled()
515 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_has_safe_mux()  local
516 	const struct stm32_mux_cfg *mux = &composite->clock_data->muxes[composite->mux_id];  in clk_stm32_has_safe_mux()
523 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_set_safe_position_mux()  local
528 		if (composite->clock_data->is_multi_mux) {  in clk_stm32_set_safe_position_mux()
531 			other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_set_safe_position_mux()
537 		spin_lock_irqsave(composite->lock, flags);  in clk_stm32_set_safe_position_mux()
539 		stm32_mux_set_parent(composite->base, composite->clock_data,  in clk_stm32_set_safe_position_mux()
540 				     composite->mux_id, MUX_SAFE_POSITION);  in clk_stm32_set_safe_position_mux()
542 		spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_set_safe_position_mux()
548 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_safe_restore_position_mux()  local
552 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_safe_restore_position_mux()
554 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, sel);  in clk_stm32_safe_restore_position_mux()
556 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_safe_restore_position_mux()
561 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_endisable()  local
564 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_gate_endisable()
566 	stm32_gate_endisable(composite->base, composite->clock_data, composite->gate_id, enable);  in clk_stm32_composite_gate_endisable()
568 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_gate_endisable()
573 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_enable()  local
575 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_gate_enable()
580 	if (composite->mux_id != NO_STM32_MUX && clk_stm32_has_safe_mux(hw))  in clk_stm32_composite_gate_enable()
588 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_disable()  local
590 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_gate_disable()
595 	if (composite->mux_id != NO_STM32_MUX && clk_stm32_has_safe_mux(hw))  in clk_stm32_composite_gate_disable()
601 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_disable_unused()  local
604 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_disable_unused()
607 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_disable_unused()
609 	stm32_gate_disable_unused(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_disable_unused()
611 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_disable_unused()
695 	struct clk_stm32_composite *composite = cfg->clock_cfg;  in clk_stm32_composite_register()  local
696 	struct clk_hw *hw = &composite->hw;  in clk_stm32_composite_register()
699 	composite->base = base;  in clk_stm32_composite_register()
700 	composite->lock = lock;  in clk_stm32_composite_register()
701 	composite->clock_data = data->clock_data;  in clk_stm32_composite_register()