Lines Matching refs:JH7110_ISPCLK_END
20 #define JH7110_ISPCLK_ISP_TOP_CORE (JH7110_ISPCLK_END + 0)
21 #define JH7110_ISPCLK_ISP_TOP_AXI (JH7110_ISPCLK_END + 1)
22 #define JH7110_ISPCLK_NOC_BUS_ISP_AXI (JH7110_ISPCLK_END + 2)
23 #define JH7110_ISPCLK_DVP_CLK (JH7110_ISPCLK_END + 3)
24 #define JH7110_ISPCLK_EXT_END (JH7110_ISPCLK_END + 4)
83 if (idx < JH7110_ISPCLK_END) in jh7110_ispclk_get()
119 struct_size(priv, reg, JH7110_ISPCLK_END), in jh7110_ispcrg_probe()
151 for (idx = 0; idx < JH7110_ISPCLK_END; idx++) { in jh7110_ispcrg_probe()
164 const char *fw_name[JH7110_ISPCLK_EXT_END - JH7110_ISPCLK_END] = { in jh7110_ispcrg_probe()
174 if (pidx < JH7110_ISPCLK_END) in jh7110_ispcrg_probe()
177 parents[i].fw_name = fw_name[pidx - JH7110_ISPCLK_END]; in jh7110_ispcrg_probe()