clk/starfive/clk-starfive-jh7110-aon.c

1 // SPDX-License-Identifier: GPL-2.0
3  * StarFive JH7110 Always-On Clock Driver
9 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/starfive,jh7110-crg.h>
15 #include "clk-starfive-jh7110.h"
60 	unsigned int idx = clkspec->args[0];  in jh7110_aonclk_get()
63 		return &priv->reg[idx].hw;  in jh7110_aonclk_get()
65 	return ERR_PTR(-EINVAL);  in jh7110_aonclk_get()
74 	priv = devm_kzalloc(&pdev->dev,  in jh7110_aoncrg_probe()
78 		return -ENOMEM;  in jh7110_aoncrg_probe()
80 	spin_lock_init(&priv->rmw_lock);  in jh7110_aoncrg_probe()
81 	priv->dev = &pdev->dev;  in jh7110_aoncrg_probe()
82 	priv->base = devm_platform_ioremap_resource(pdev, 0);  in jh7110_aoncrg_probe()
83 	if (IS_ERR(priv->base))  in jh7110_aoncrg_probe()
84 		return PTR_ERR(priv->base);  in jh7110_aoncrg_probe()
97 		struct jh71x0_clk *clk = &priv->reg[idx];  in jh7110_aoncrg_probe()
104 				parents[i].hw = &priv->reg[pidx].hw;  in jh7110_aoncrg_probe()
121 		clk->hw.init = &init;  in jh7110_aoncrg_probe()
122 		clk->idx = idx;  in jh7110_aoncrg_probe()
123 		clk->max_div = max & JH71X0_CLK_DIV_MASK;  in jh7110_aoncrg_probe()
125 		ret = devm_clk_hw_register(&pdev->dev, &clk->hw);  in jh7110_aoncrg_probe()
130 	ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_aonclk_get, priv);  in jh7110_aoncrg_probe()
134 	return jh7110_reset_controller_register(priv, "rst-aon", 1);  in jh7110_aoncrg_probe()
138 	{ .compatible = "starfive,jh7110-aoncrg" },
146 		.name = "clk-starfive-jh7110-aon",
153 MODULE_DESCRIPTION("StarFive JH7110 always-on clock driver");