39 	return cv1800_clk_checkbit(&gate->common, &gate->gate);  in gate_is_enabled()
104 	return cv1800_clk_checkbit(&div->common, &div->gate);  in div_is_enabled()
309 		if (cv1800_clk_checkbit(&div->div.common, &div->bypass))  in bypass_div_round_rate()
336 	if (cv1800_clk_checkbit(&div->div.common, &div->bypass))  in bypass_div_recalc_rate()
347 	if (cv1800_clk_checkbit(&div->div.common, &div->bypass))  in bypass_div_set_rate()
357 	if (cv1800_clk_checkbit(&div->div.common, &div->bypass))  in bypass_div_get_parent()
412 	return cv1800_clk_checkbit(&mux->common, &mux->gate);  in mux_is_enabled()
520 		if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_round_rate()
547 	if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_recalc_rate()
558 	if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_set_rate()
568 	if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_get_parent()
637 	return cv1800_clk_checkbit(&mmux->common, &mmux->gate);  in mmux_is_enabled()
647 		if (cv1800_clk_checkbit(&mmux->common, &mmux->bypass))  in mmux_round_rate()
679 	if (cv1800_clk_checkbit(&mmux->common, &mmux->bypass))  in mmux_recalc_rate()
682 	if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))  in mmux_recalc_rate()
702 	if (cv1800_clk_checkbit(&mmux->common, &mmux->bypass))  in mmux_set_rate()
705 	if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))  in mmux_set_rate()
723 	if (cv1800_clk_checkbit(&mmux->common, &mmux->bypass))  in mmux_get_parent()
726 	if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))  in mmux_get_parent()
813 	return cv1800_clk_checkbit(&aclk->common, &aclk->output_en);  in aclk_is_enabled()
834 	if (!cv1800_clk_checkbit(&aclk->common, &aclk->div_en))  in aclk_recalc_rate()