Lines Matching full:mux
386 /* MUX */
396 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_enable() local
398 return cv1800_clk_setbit(&mux->common, &mux->gate); in mux_enable()
403 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_disable() local
405 cv1800_clk_clearbit(&mux->common, &mux->gate); in mux_disable()
410 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_is_enabled() local
412 return cv1800_clk_checkbit(&mux->common, &mux->gate); in mux_is_enabled()
418 struct cv1800_clk_mux *mux = data; in mux_round_rate() local
420 return div_helper_round_rate(&mux->div, &mux->common.hw, parent, in mux_round_rate()
427 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_determine_rate() local
429 return mux_helper_determine_rate(&mux->common, req, in mux_determine_rate()
430 mux_round_rate, mux); in mux_determine_rate()
436 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_recalc_rate() local
439 val = div_helper_get_clockdiv(&mux->common, &mux->div); in mux_recalc_rate()
444 mux->div.flags, mux->div.width); in mux_recalc_rate()
450 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_set_rate() local
454 mux->div.width, mux->div.flags); in mux_set_rate()
456 return div_helper_set_rate(&mux->common, &mux->div, val); in mux_set_rate()
461 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_get_parent() local
462 u32 reg = readl(mux->common.base + mux->mux.reg); in mux_get_parent()
464 return cv1800_clk_regfield_get(reg, &mux->mux); in mux_get_parent()
467 static int _mux_set_parent(struct cv1800_clk_mux *mux, u8 index) in _mux_set_parent() argument
471 reg = readl(mux->common.base + mux->mux.reg); in _mux_set_parent()
472 reg = cv1800_clk_regfield_set(reg, index, &mux->mux); in _mux_set_parent()
473 writel(reg, mux->common.base + mux->mux.reg); in _mux_set_parent()
480 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_set_parent() local
483 spin_lock_irqsave(mux->common.lock, flags); in mux_set_parent()
485 _mux_set_parent(mux, index); in mux_set_parent()
487 spin_unlock_irqrestore(mux->common.lock, flags); in mux_set_parent()
508 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in hw_to_cv1800_clk_bypass_mux() local
510 return container_of(mux, struct cv1800_clk_bypass_mux, mux); in hw_to_cv1800_clk_bypass_mux()
517 struct cv1800_clk_bypass_mux *mux = data; in bypass_mux_round_rate() local
520 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_round_rate()
524 -1, &mux->mux); in bypass_mux_round_rate()
530 return mux_round_rate(parent, parent_rate, rate, id - 1, &mux->mux); in bypass_mux_round_rate()
536 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); in bypass_mux_determine_rate() local
538 return mux_helper_determine_rate(&mux->mux.common, req, in bypass_mux_determine_rate()
539 bypass_mux_round_rate, mux); in bypass_mux_determine_rate()
545 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); in bypass_mux_recalc_rate() local
547 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_recalc_rate()
556 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); in bypass_mux_set_rate() local
558 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_set_rate()
566 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); in bypass_mux_get_parent() local
568 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_get_parent()
576 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); in bypass_mux_set_parent() local
579 return cv1800_clk_setbit(&mux->mux.common, &mux->bypass); in bypass_mux_set_parent()
581 return cv1800_clk_clearbit(&mux->mux.common, &mux->bypass); in bypass_mux_set_parent()
719 struct cv1800_clk_regfield *mux; in mmux_get_parent() local
730 mux = &mmux->mux[clk_sel]; in mmux_get_parent()
732 reg = readl(mmux->common.base + mux->reg); in mmux_get_parent()
734 return mmux->sel2parent[clk_sel][cv1800_clk_regfield_get(reg, mux)]; in mmux_get_parent()
740 struct cv1800_clk_regfield *mux; in mmux_set_parent() local
759 mux = &mmux->mux[clk_sel]; in mmux_set_parent()
760 reg = readl(mmux->common.base + mux->reg); in mmux_set_parent()
761 reg = cv1800_clk_regfield_set(reg, index, mux); in mmux_set_parent()
763 writel(reg, mmux->common.base + mux->reg); in mmux_set_parent()