669 	u32 con0, con1;  in samsung_pll45xx_set_rate()  local
680 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
682 	if (!(samsung_pll45xx_mp_change(con0, con1, rate))) {  in samsung_pll45xx_set_rate()
700 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
701 	con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT);  in samsung_pll45xx_set_rate()
702 	con1 |= (rate->afc << PLL45XX_AFC_SHIFT);  in samsung_pll45xx_set_rate()
717 	writel_relaxed(con1, pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
806 	u32 con0, con1, lock;  in samsung_pll46xx_set_rate()  local
817 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
819 	if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) {  in samsung_pll46xx_set_rate()
852 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
853 	con1 &= ~((PLL46XX_KDIV_MASK << PLL46XX_KDIV_SHIFT) |  in samsung_pll46xx_set_rate()
856 	con1 |= (rate->kdiv << PLL46XX_KDIV_SHIFT) |  in samsung_pll46xx_set_rate()
863 	writel_relaxed(con1, pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
1139 	u32 con0, con1;  in samsung_pll2650x_set_rate()  local
1150 	con1 = readl_relaxed(pll->con_reg + 4);  in samsung_pll2650x_set_rate()
1165 	con1 &= ~(PLL2650X_K_MASK << PLL2650X_K_SHIFT);  in samsung_pll2650x_set_rate()
1166 	con1 |= ((rate->kdiv & PLL2650X_K_MASK) << PLL2650X_K_SHIFT);  in samsung_pll2650x_set_rate()
1167 	writel_relaxed(con1, pll->con_reg + 4);  in samsung_pll2650x_set_rate()