Lines Matching full:21
488 CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
490 CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
492 CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD, 21, 0, 0),
494 CLK_CON_GAT_GATE_CLKCMU_CORE_SSS, 21, 0, 0),
498 "mout_clkcmu_apm_bus", CLK_CON_GAT_GATE_CLKCMU_APM_BUS, 21, 0, 0),
502 CLK_CON_GAT_GATE_CLKCMU_AUD, 21, 0, 0),
506 CLK_CON_GAT_GATE_CLKCMU_CPUCL0_DBG, 21, 0, 0),
508 CLK_CON_GAT_GATE_CLKCMU_CPUCL0_SWITCH, 21, 0, 0),
512 CLK_CON_GAT_GATE_CLKCMU_CPUCL1_DBG, 21, 0, 0),
514 CLK_CON_GAT_GATE_CLKCMU_CPUCL1_SWITCH, 21, 0, 0),
518 CLK_CON_GAT_GATE_CLKCMU_DPU, 21, 0, 0),
522 CLK_CON_GAT_GATE_CLKCMU_G3D_SWITCH, 21, 0, 0),
526 CLK_CON_GAT_GATE_CLKCMU_HSI_BUS, 21, 0, 0),
528 CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD, 21, 0, 0),
530 CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD, 21, 0, 0),
535 CLK_CON_GAT_GATE_CLKCMU_IS_BUS, 21, CLK_IS_CRITICAL, 0),
537 CLK_CON_GAT_GATE_CLKCMU_IS_ITP, 21, CLK_IS_CRITICAL, 0),
539 CLK_CON_GAT_GATE_CLKCMU_IS_VRA, 21, CLK_IS_CRITICAL, 0),
541 CLK_CON_GAT_GATE_CLKCMU_IS_GDC, 21, CLK_IS_CRITICAL, 0),
546 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_MFC, 21, CLK_IS_CRITICAL, 0),
548 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_M2M, 21, CLK_IS_CRITICAL, 0),
550 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_MCSC, 21, CLK_IS_CRITICAL, 0),
552 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_JPEG, 21, CLK_IS_CRITICAL, 0),
556 CLK_CON_GAT_GATE_CLKCMU_PERI_BUS, 21, 0, 0),
558 CLK_CON_GAT_GATE_CLKCMU_PERI_UART, 21, 0, 0),
560 CLK_CON_GAT_GATE_CLKCMU_PERI_IP, 21, 0, 0),
679 CLK_CON_GAT_CLKCMU_CMGP_BUS, 21, CLK_SET_RATE_PARENT, 0),
682 CLK_CON_GAT_GATE_CLKCMU_CHUB_BUS, 21, 0, 0),
684 CLK_CON_GAT_GOUT_APM_APBIF_RTC_PCLK, 21, 0, 0),
686 CLK_CON_GAT_GOUT_APM_APBIF_TOP_RTC_PCLK, 21, 0, 0),
688 CLK_CON_GAT_GOUT_APM_I3C_APM_PMIC_I_PCLK, 21, 0, 0),
690 CLK_CON_GAT_GOUT_APM_I3C_APM_PMIC_I_SCLK, 21, 0, 0),
692 CLK_CON_GAT_GOUT_APM_SPEEDY_APM_PCLK, 21, 0, 0),
695 CLK_CON_GAT_GOUT_APM_APBIF_GPIO_ALIVE_PCLK, 21, CLK_IGNORE_UNUSED,
698 CLK_CON_GAT_GOUT_APM_APBIF_PMU_ALIVE_PCLK, 21, CLK_IS_CRITICAL, 0),
700 CLK_CON_GAT_GOUT_APM_SYSREG_APM_PCLK, 21, 0, 0),
938 CLK_CON_GAT_CLK_AUD_CMU_AUD_PCLK, 21, CLK_IGNORE_UNUSED, 0),
940 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_CA32, 21, 0, 0),
942 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_ASB, 21, 0, 0),
944 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_DAP, 21, 0, 0),
947 CLK_CON_GAT_GOUT_AUD_ABOX_ACLK, 21, CLK_IGNORE_UNUSED, 0),
949 CLK_CON_GAT_GOUT_AUD_GPIO_PCLK, 21, 0, 0),
951 CLK_CON_GAT_GOUT_AUD_PPMU_ACLK, 21, 0, 0),
953 CLK_CON_GAT_GOUT_AUD_PPMU_PCLK, 21, 0, 0),
955 CLK_CON_GAT_GOUT_AUD_SYSMMU_CLK_S1, 21, 0, 0),
957 CLK_CON_GAT_GOUT_AUD_SYSREG_PCLK, 21, 0, 0),
959 CLK_CON_GAT_GOUT_AUD_WDT_PCLK, 21, 0, 0),
961 CLK_CON_GAT_GOUT_AUD_TZPC_PCLK, 21, 0, 0),
963 CLK_CON_GAT_GOUT_AUD_CODEC_MCLK, 21, 0, 0),
965 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_CNT, 21, 0, 0),
967 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF0, 21, 0, 0),
969 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF1, 21, 0, 0),
971 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF2, 21, 0, 0),
973 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF3, 21, 0, 0),
975 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF4, 21, 0, 0),
977 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF5, 21, 0, 0),
979 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF6, 21, 0, 0),
981 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_SPDY, 21, 0, 0),
1066 CLK_CON_GAT_GOUT_CMGP_ADC_PCLK_S0, 21, 0, 0),
1069 CLK_CON_GAT_GOUT_CMGP_ADC_PCLK_S1, 21, 0, 0),
1073 CLK_CON_GAT_GOUT_CMGP_GPIO_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1075 CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_IPCLK, 21, CLK_SET_RATE_PARENT, 0),
1078 CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_PCLK, 21, 0, 0),
1080 CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_IPCLK, 21, CLK_SET_RATE_PARENT, 0),
1083 CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_PCLK, 21, 0, 0),
1086 CLK_CON_GAT_GOUT_CMGP_SYSREG_CMGP_PCLK, 21, 0, 0),
1229 CLK_CON_GAT_CLK_CPUCL0_CMU_CPUCL0_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1233 CLK_CON_GAT_GATE_CLK_CPUCL0_CPU, 21, CLK_IGNORE_UNUSED, 0),
1235 CLK_CON_GAT_CLK_CPUCL0_CLUSTER0_SCLK, 21, CLK_IGNORE_UNUSED, 0),
1238 CLK_CON_GAT_CLK_CPUCL0_CLUSTER0_ATCLK, 21, CLK_IGNORE_UNUSED, 0),
1241 CLK_CON_GAT_CLK_CPUCL0_CLUSTER0_PERIPHCLK, 21,
1245 CLK_CON_GAT_CLK_CPUCL0_CLUSTER0_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1419 CLK_CON_GAT_CLK_CPUCL1_CMU_CPUCL1_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1423 CLK_CON_GAT_GATE_CLK_CPUCL1_CPU, 21, CLK_IGNORE_UNUSED, 0),
1425 CLK_CON_GAT_CLK_CPUCL1_CLUSTER1_SCLK, 21, CLK_IGNORE_UNUSED, 0),
1428 CLK_CON_GAT_CLK_CPUCL1_CLUSTER1_ATCLK, 21, CLK_IGNORE_UNUSED, 0),
1431 CLK_CON_GAT_CLK_CPUCL1_CLUSTER1_PERIPHCLK, 21,
1435 CLK_CON_GAT_CLK_CPUCL1_CLUSTER1_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1536 CLK_CON_GAT_CLK_G3D_CMU_G3D_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1538 CLK_CON_GAT_CLK_G3D_GPU_CLK, 21, 0, 0),
1540 CLK_CON_GAT_GOUT_G3D_TZPC_PCLK, 21, 0, 0),
1543 CLK_CON_GAT_GOUT_G3D_GRAY2BIN_CLK, 21, 0, 0),
1545 CLK_CON_GAT_GOUT_G3D_BUSD_CLK, 21, 0, 0),
1547 CLK_CON_GAT_GOUT_G3D_BUSP_CLK, 21, 0, 0),
1549 CLK_CON_GAT_GOUT_G3D_SYSREG_PCLK, 21, 0, 0),
1629 CLK_CON_GAT_CLK_HSI_CMU_HSI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1631 CLK_CON_GAT_HSI_USB20DRD_TOP_I_RTC_CLK__ALV, 21, 0, 0),
1633 CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50, 21, 0, 0),
1635 CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26, 21, 0, 0),
1638 CLK_CON_GAT_GOUT_HSI_GPIO_HSI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1640 CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK, 21, 0, 0),
1643 CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN, 21, CLK_SET_RATE_PARENT, 0),
1645 CLK_CON_GAT_GOUT_HSI_PPMU_ACLK, 21, 0, 0),
1647 CLK_CON_GAT_GOUT_HSI_PPMU_PCLK, 21, 0, 0),
1650 CLK_CON_GAT_GOUT_HSI_SYSREG_HSI_PCLK, 21, 0, 0),
1652 CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20, 21, 0, 0),
1655 CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY, 21, 0, 0),
1746 CLK_CON_GAT_CLK_IS_CMU_IS_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1748 CLK_CON_GAT_GOUT_IS_CSIS0_ACLK, 21, 0, 0),
1750 CLK_CON_GAT_GOUT_IS_CSIS1_ACLK, 21, 0, 0),
1752 CLK_CON_GAT_GOUT_IS_CSIS2_ACLK, 21, 0, 0),
1754 CLK_CON_GAT_GOUT_IS_TZPC_PCLK, 21, 0, 0),
1757 CLK_CON_GAT_GOUT_IS_CLK_CSIS_DMA, 21, 0, 0),
1759 CLK_CON_GAT_GOUT_IS_CLK_GDC, 21, 0, 0),
1761 CLK_CON_GAT_GOUT_IS_CLK_IPP, 21, 0, 0),
1763 CLK_CON_GAT_GOUT_IS_CLK_ITP, 21, 0, 0),
1765 CLK_CON_GAT_GOUT_IS_CLK_MCSC, 21, 0, 0),
1767 CLK_CON_GAT_GOUT_IS_CLK_VRA, 21, 0, 0),
1770 CLK_CON_GAT_GOUT_IS_PPMU_IS0_ACLK, 21, 0, 0),
1772 CLK_CON_GAT_GOUT_IS_PPMU_IS0_PCLK, 21, 0, 0),
1775 CLK_CON_GAT_GOUT_IS_PPMU_IS1_ACLK, 21, 0, 0),
1777 CLK_CON_GAT_GOUT_IS_PPMU_IS1_PCLK, 21, 0, 0),
1780 CLK_CON_GAT_GOUT_IS_SYSMMU_IS0_CLK_S1, 21, 0, 0),
1783 CLK_CON_GAT_GOUT_IS_SYSMMU_IS1_CLK_S1, 21, 0, 0),
1785 CLK_CON_GAT_GOUT_IS_SYSREG_PCLK, 21, 0, 0),
1867 21, CLK_IGNORE_UNUSED, 0),
1870 21, 0, 0),
1873 21, 0, 0),
1876 21, 0, 0),
1879 21, 0, 0),
1882 21, 0, 0),
1885 21, 0, 0),
1888 21, 0, 0),
1891 21, 0, 0),
1894 21, 0, 0),
2018 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_0, 21, 0, 0),
2020 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_1, 21, 0, 0),
2022 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_2, 21, 0, 0),
2024 CLK_CON_GAT_GOUT_PERI_HSI2C_0_IPCLK, 21, 0, 0),
2026 CLK_CON_GAT_GOUT_PERI_HSI2C_0_PCLK, 21, 0, 0),
2028 CLK_CON_GAT_GOUT_PERI_HSI2C_1_IPCLK, 21, 0, 0),
2030 CLK_CON_GAT_GOUT_PERI_HSI2C_1_PCLK, 21, 0, 0),
2032 CLK_CON_GAT_GOUT_PERI_HSI2C_2_IPCLK, 21, 0, 0),
2034 CLK_CON_GAT_GOUT_PERI_HSI2C_2_PCLK, 21, 0, 0),
2036 CLK_CON_GAT_GOUT_PERI_I2C_0_PCLK, 21, 0, 0),
2038 CLK_CON_GAT_GOUT_PERI_I2C_1_PCLK, 21, 0, 0),
2040 CLK_CON_GAT_GOUT_PERI_I2C_2_PCLK, 21, 0, 0),
2042 CLK_CON_GAT_GOUT_PERI_I2C_3_PCLK, 21, 0, 0),
2044 CLK_CON_GAT_GOUT_PERI_I2C_4_PCLK, 21, 0, 0),
2046 CLK_CON_GAT_GOUT_PERI_I2C_5_PCLK, 21, 0, 0),
2048 CLK_CON_GAT_GOUT_PERI_I2C_6_PCLK, 21, 0, 0),
2050 CLK_CON_GAT_GOUT_PERI_MCT_PCLK, 21, 0, 0),
2053 CLK_CON_GAT_GOUT_PERI_PWM_MOTOR_PCLK, 21, 0, 0),
2055 CLK_CON_GAT_GOUT_PERI_SPI_0_IPCLK, 21, CLK_SET_RATE_PARENT, 0),
2057 CLK_CON_GAT_GOUT_PERI_SPI_0_PCLK, 21, 0, 0),
2060 CLK_CON_GAT_GOUT_PERI_SYSREG_PERI_PCLK, 21, 0, 0),
2062 CLK_CON_GAT_GOUT_PERI_UART_IPCLK, 21, 0, 0),
2064 CLK_CON_GAT_GOUT_PERI_UART_PCLK, 21, 0, 0),
2066 CLK_CON_GAT_GOUT_PERI_WDT_0_PCLK, 21, 0, 0),
2068 CLK_CON_GAT_GOUT_PERI_WDT_1_PCLK, 21, 0, 0),
2072 CLK_CON_GAT_GOUT_PERI_GPIO_PERI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
2075 CLK_CON_GAT_GOUT_PERI_BUSIF_TMU_PCLK, 21, 0, 0),
2168 CLK_CON_GAT_GOUT_CORE_CCI_550_ACLK, 21, CLK_IS_CRITICAL, 0),
2171 CLK_CON_GAT_GOUT_CORE_GIC_CLK, 21, CLK_IS_CRITICAL, 0),
2173 CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK, 21, 0, 0),
2176 21, CLK_SET_RATE_PARENT, 0),
2178 "mout_core_bus_user", CLK_CON_GAT_GOUT_CORE_PDMA_ACLK, 21, 0, 0),
2180 "mout_core_bus_user", CLK_CON_GAT_GOUT_CORE_SPDMA_ACLK, 21, 0, 0),
2182 CLK_CON_GAT_GOUT_CORE_SSS_I_ACLK, 21, 0, 0),
2184 CLK_CON_GAT_GOUT_CORE_SSS_I_PCLK, 21, 0, 0),
2187 CLK_CON_GAT_GOUT_CORE_GPIO_CORE_PCLK, 21, CLK_IGNORE_UNUSED, 0),
2190 CLK_CON_GAT_GOUT_CORE_SYSREG_CORE_PCLK, 21, 0, 0),
2250 CLK_CON_GAT_CLK_DPU_CMU_DPU_PCLK, 21, CLK_IGNORE_UNUSED, 0),
2252 CLK_CON_GAT_GOUT_DPU_ACLK_DECON0, 21, 0, 0),
2254 CLK_CON_GAT_GOUT_DPU_ACLK_DMA, 21, 0, 0),
2256 CLK_CON_GAT_GOUT_DPU_ACLK_DPP, 21, 0, 0),
2258 CLK_CON_GAT_GOUT_DPU_PPMU_ACLK, 21, 0, 0),
2260 CLK_CON_GAT_GOUT_DPU_PPMU_PCLK, 21, 0, 0),
2262 CLK_CON_GAT_GOUT_DPU_SMMU_CLK, 21, 0, 0),
2264 CLK_CON_GAT_GOUT_DPU_SYSREG_PCLK, 21, 0, 0),