Lines Matching full:oscclk
213 PNAME(mout_aud_pll_p) = { "oscclk", "fout_aud_pll", };
214 PNAME(mout_isp_pll_p) = { "oscclk", "fout_isp_pll", };
215 PNAME(mout_aud_pll_user_p) = { "oscclk", "mout_aud_pll", };
216 PNAME(mout_mphy_pll_user_p) = { "oscclk", "sclk_mphy_pll", };
217 PNAME(mout_mfc_pll_user_p) = { "oscclk", "sclk_mfc_pll", };
218 PNAME(mout_bus_pll_user_p) = { "oscclk", "sclk_bus_pll", };
219 PNAME(mout_bus_pll_user_t_p) = { "oscclk", "mout_bus_pll_user", };
220 PNAME(mout_mphy_pll_user_t_p) = { "oscclk", "mout_mphy_pll_user", };
251 "oscclk", "ioclk_spdif_extclk", };
252 PNAME(mout_sclk_audio1_p) = { "ioclk_audiocdclk1", "oscclk",
254 PNAME(mout_sclk_audio0_p) = { "ioclk_audiocdclk0", "oscclk",
260 FFACTOR(0, "oscclk_efuse_common", "oscclk", 1, 1, 0),
664 GATE(CLK_SCLK_ISP_MCTADC_CAM1, "sclk_isp_mctadc_cam1", "oscclk",
805 PLL(pll_35xx, CLK_FOUT_ISP_PLL, "fout_isp_pll", "oscclk",
807 PLL(pll_36xx, CLK_FOUT_AUD_PLL, "fout_aud_pll", "oscclk",
867 PNAME(mout_mphy_pll_p) = { "oscclk", "fout_mphy_pll", };
870 PLL(pll_35xx, CLK_FOUT_MPHY_PLL, "fout_mphy_pll", "oscclk",
1063 PLL(pll_35xx, CLK_FOUT_MEM0_PLL, "fout_mem0_pll", "oscclk",
1065 PLL(pll_35xx, CLK_FOUT_MEM1_PLL, "fout_mem1_pll", "oscclk",
1067 PLL(pll_35xx, CLK_FOUT_BUS_PLL, "fout_bus_pll", "oscclk",
1069 PLL(pll_35xx, CLK_FOUT_MFC_PLL, "fout_mfc_pll", "oscclk",
1078 PNAME(mout_mfc_pll_p) = { "oscclk", "fout_mfc_pll", };
1079 PNAME(mout_bus_pll_p) = { "oscclk", "fout_bus_pll", };
1080 PNAME(mout_mem1_pll_p) = { "oscclk", "fout_mem1_pll", };
1081 PNAME(mout_mem0_pll_p) = { "oscclk", "fout_mem0_pll", };
1099 PNAME(mout_sclk_decon_p) = { "oscclk", "mout_bus_pll_div2", };
1111 PNAME(mout_sclk_dsd_a_p) = { "oscclk", "mout_mfc_pll_div2", };
1291 GATE(CLK_RCLK_DREX1, "rclk_drex1", "oscclk", ENABLE_ACLK_MIF0,
1293 GATE(CLK_RCLK_DREX0, "rclk_drex0", "oscclk", ENABLE_ACLK_MIF0,
1602 DIV(CLK_DIV_SCLK_SCI, "div_sclk_sci", "oscclk", DIV_PERIC, 4, 4),
1603 DIV(CLK_DIV_SCLK_SC_IN, "div_sclk_sc_in", "oscclk", DIV_PERIC, 0, 4),
1717 GATE(CLK_SCLK_PWM, "sclk_pwm", "oscclk", ENABLE_SCLK_PERIC, 15, 0, 0),
1991 PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", };
1992 PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", };
1993 PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",};
1994 PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",};
1995 PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };
1996 PNAME(mout_sclk_mmc1_user_p) = { "oscclk", "sclk_mmc1_fsys", };
1997 PNAME(mout_sclk_mmc0_user_p) = { "oscclk", "sclk_mmc0_fsys", };
1998 PNAME(mout_sclk_usbhost30_user_p) = { "oscclk", "sclk_usbhost30_fsys",};
1999 PNAME(mout_sclk_usbdrd30_user_p) = { "oscclk", "sclk_usbdrd30_fsys", };
2002 = { "oscclk", "phyclk_usbhost30_uhost30_pipe_pclk_phy", };
2004 = { "oscclk", "phyclk_usbhost30_uhost30_phyclock_phy", };
2006 = { "oscclk", "phyclk_usbhost20_phy_hsic1_phy", };
2008 = { "oscclk", "phyclk_usbhost20_phy_clk48mohci_phy", };
2010 = { "oscclk", "phyclk_usbhost20_phy_phyclock_phy", };
2012 = { "oscclk", "phyclk_usbhost20_phy_freeclk_phy", };
2014 = { "oscclk", "phyclk_usbdrd30_udrd30_pipe_pclk_phy", };
2016 = { "oscclk", "phyclk_usbdrd30_udrd30_phyclock_phy", };
2018 = { "oscclk", "phyclk_ufs_rx1_symbol_phy", };
2020 = { "oscclk", "phyclk_ufs_rx0_symbol_phy", };
2022 = { "oscclk", "phyclk_ufs_tx1_symbol_phy", };
2024 = { "oscclk", "phyclk_ufs_tx0_symbol_phy", };
2026 = { "oscclk", "phyclk_lli_mphy_to_ufs_phy", };
2404 PNAME(mout_aclk_g2d_266_user_p) = { "oscclk", "aclk_g2d_266", };
2405 PNAME(mout_aclk_g2d_400_user_p) = { "oscclk", "aclk_g2d_400", };
2570 PNAME(mout_disp_pll_p) = { "oscclk", "fout_disp_pll", };
2571 PNAME(mout_sclk_dsim1_user_p) = { "oscclk", "sclk_dsim1_disp", };
2572 PNAME(mout_sclk_dsim0_user_p) = { "oscclk", "sclk_dsim0_disp", };
2573 PNAME(mout_sclk_dsd_user_p) = { "oscclk", "sclk_dsd_disp", };
2574 PNAME(mout_sclk_decon_tv_eclk_user_p) = { "oscclk",
2576 PNAME(mout_sclk_decon_vclk_user_p) = { "oscclk",
2578 PNAME(mout_sclk_decon_eclk_user_p) = { "oscclk",
2580 PNAME(mout_sclk_decon_tv_vlkc_user_p) = { "oscclk",
2582 PNAME(mout_aclk_disp_333_user_p) = { "oscclk", "aclk_disp_333", };
2584 PNAME(mout_phyclk_mipidphy1_bitclkdiv8_user_p) = { "oscclk",
2586 PNAME(mout_phyclk_mipidphy1_rxclkesc0_user_p) = { "oscclk",
2588 PNAME(mout_phyclk_mipidphy0_bitclkdiv8_user_p) = { "oscclk",
2590 PNAME(mout_phyclk_mipidphy0_rxclkesc0_user_p) = { "oscclk",
2592 PNAME(mout_phyclk_hdmiphy_tmds_clko_user_p) = { "oscclk",
2594 PNAME(mout_phyclk_hdmiphy_pixel_clko_user_p) = { "oscclk",
2615 PLL(pll_35xx, CLK_FOUT_DISP_PLL, "fout_disp_pll", "oscclk",
2961 PNAME(mout_aud_pll_user_aud_p) = { "oscclk", "fout_aud_pll", };
3106 PNAME(mout_aclk_bus2_400_p) = { "oscclk", "aclk_bus2_400", };
3298 PNAME(mout_g3d_pll_p) = { "oscclk", "fout_g3d_pll", };
3301 PLL(pll_35xx, CLK_FOUT_G3D_PLL, "fout_g3d_pll", "oscclk",
3419 PNAME(aclk_gscl_111_user_p) = { "oscclk", "aclk_gscl_111", };
3420 PNAME(aclk_gscl_333_user_p) = { "oscclk", "aclk_gscl_333", };
3583 PNAME(mout_apollo_pll_p) = { "oscclk", "fout_apollo_pll", };
3584 PNAME(mout_bus_pll_apollo_user_p) = { "oscclk", "sclk_bus_pll_apollo", };
3589 PLL(pll_35xx, CLK_FOUT_APOLLO_PLL, "fout_apollo_pll", "oscclk",
3796 PNAME(mout_atlas_pll_p) = { "oscclk", "fout_atlas_pll", };
3797 PNAME(mout_bus_pll_atlas_user_p) = { "oscclk", "sclk_bus_pll_atlas", };
3802 PLL(pll_35xx, CLK_FOUT_ATLAS_PLL, "fout_atlas_pll", "oscclk",
4028 PNAME(mout_sclk_jpeg_user_p) = { "oscclk", "sclk_jpeg_mscl", };
4029 PNAME(mout_aclk_mscl_400_user_p) = { "oscclk", "aclk_mscl_400", };
4177 PNAME(mout_aclk_mfc_400_user_p) = { "oscclk", "aclk_mfc_400", };
4285 PNAME(mout_aclk_hevc_400_user_p) = { "oscclk", "aclk_hevc_400", };
4399 PNAME(mout_aclk_isp_dis_400_user_p) = { "oscclk", "aclk_isp_dis_400", };
4400 PNAME(mout_aclk_isp_400_user_p) = { "oscclk", "aclk_isp_400", };
4687 PNAME(mout_aclk_cam0_333_user_p) = { "oscclk", "aclk_cam0_333", };
4688 PNAME(mout_aclk_cam0_400_user_p) = { "oscclk", "aclk_cam0_400", };
4689 PNAME(mout_aclk_cam0_552_user_p) = { "oscclk", "aclk_cam0_552", };
4691 PNAME(mout_phyclk_rxbyteclkhs0_s4_user_p) = { "oscclk",
4693 PNAME(mout_phyclk_rxbyteclkhs0_s2a_user_p) = { "oscclk",
5149 PNAME(mout_sclk_isp_uart_user_p) = { "oscclk", "sclk_isp_uart_cam1", };
5150 PNAME(mout_sclk_isp_spi1_user_p) = { "oscclk", "sclk_isp_spi1_cam1", };
5151 PNAME(mout_sclk_isp_spi0_user_p) = { "oscclk", "sclk_isp_spi0_cam1", };
5153 PNAME(mout_aclk_cam1_333_user_p) = { "oscclk", "aclk_cam1_333", };
5154 PNAME(mout_aclk_cam1_400_user_p) = { "oscclk", "aclk_cam1_400", };
5155 PNAME(mout_aclk_cam1_552_user_p) = { "oscclk", "aclk_cam1_552", };
5157 PNAME(mout_phyclk_rxbyteclkhs0_s2b_user_p) = { "oscclk",
5422 GATE(CLK_SCLK_ISP_I2C2, "sclk_isp_i2c2", "oscclk", ENABLE_SCLK_CAM1,
5424 GATE(CLK_SCLK_ISP_I2C1, "sclk_isp_i2c1", "oscclk", ENABLE_SCLK_CAM1,
5426 GATE(CLK_SCLK_ISP_I2C0, "sclk_isp_i2c0", "oscclk", ENABLE_SCLK_CAM1,
5428 GATE(CLK_SCLK_ISP_PWM, "sclk_isp_pwm", "oscclk", ENABLE_SCLK_CAM1,