68  * @np:		CMU device tree node with "reg" property (CMU addr)
69  * @cmu:	CMU data
74 					    const struct samsung_cmu_info *cmu)  in exynos_arm64_init_clocks()  argument
76 	const unsigned long *reg_offs = cmu->clk_regs;  in exynos_arm64_init_clocks()
77 	size_t reg_offs_len = cmu->nr_clk_regs;  in exynos_arm64_init_clocks()
89 		if (cmu->manual_plls && is_pll_con1_reg(reg_offs[i])) {  in exynos_arm64_init_clocks()
103  * exynos_arm64_enable_bus_clk - Enable parent clock of specified CMU
107  * @np:		CMU device tree node
108  * @cmu:	CMU data
110  * Keep CMU parent clock running (needed for CMU registers access).
115 		struct device_node *np, const struct samsung_cmu_info *cmu)  in exynos_arm64_enable_bus_clk()  argument
119 	if (!cmu->clk_name)  in exynos_arm64_enable_bus_clk()
125 		parent_clk = clk_get(dev, cmu->clk_name);  in exynos_arm64_enable_bus_clk()
130 		parent_clk = of_clk_get_by_name(np, cmu->clk_name);  in exynos_arm64_enable_bus_clk()
140 		const struct samsung_cmu_info *cmu)  in exynos_arm64_cmu_prepare_pm()  argument
145 	data->clk_save = samsung_clk_alloc_reg_dump(cmu->clk_regs,  in exynos_arm64_cmu_prepare_pm()
146 						    cmu->nr_clk_regs);  in exynos_arm64_cmu_prepare_pm()
150 	data->nr_clk_save = cmu->nr_clk_regs;  in exynos_arm64_cmu_prepare_pm()
151 	data->clk_suspend = cmu->suspend_regs;  in exynos_arm64_cmu_prepare_pm()
152 	data->nr_clk_suspend = cmu->nr_suspend_regs;  in exynos_arm64_cmu_prepare_pm()
180  * exynos_arm64_register_cmu - Register specified Exynos CMU domain
183  * @np:		CMU device tree node
184  * @cmu:	CMU data
186  * Register specified CMU domain, which includes next steps:
188  * 1. Enable parent clock of @cmu CMU
189  * 2. Set initial registers configuration for @cmu CMU clocks
190  * 3. Register @cmu CMU clocks using Samsung clock framework API
193 		struct device_node *np, const struct samsung_cmu_info *cmu)  in exynos_arm64_register_cmu()  argument
201 	err = exynos_arm64_enable_bus_clk(dev, np, cmu);  in exynos_arm64_register_cmu()
204 		       __func__, cmu->clk_name, err);  in exynos_arm64_register_cmu()
206 	exynos_arm64_init_clocks(np, cmu);  in exynos_arm64_register_cmu()
207 	samsung_cmu_register_one(np, cmu);  in exynos_arm64_register_cmu()
211  * exynos_arm64_register_cmu_pm - Register Exynos CMU domain with PM support
224 	const struct samsung_cmu_info *cmu;  in exynos_arm64_register_cmu_pm()  local
231 	cmu = of_device_get_match_data(dev);  in exynos_arm64_register_cmu_pm()
239 	ret = exynos_arm64_cmu_prepare_pm(dev, cmu);  in exynos_arm64_register_cmu_pm()
247 	ret = exynos_arm64_enable_bus_clk(dev, NULL, cmu);  in exynos_arm64_register_cmu_pm()
250 		       __func__, cmu->clk_name, ret);  in exynos_arm64_register_cmu_pm()
253 		exynos_arm64_init_clocks(np, cmu);  in exynos_arm64_register_cmu_pm()
259 	data->ctx = samsung_clk_init(dev, reg_base, cmu->nr_clk_ids);  in exynos_arm64_register_cmu_pm()
271 	samsung_cmu_register_clocks(data->ctx, cmu);  in exynos_arm64_register_cmu_pm()