199 	const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg;  in exynos_cpuclk_pre_rate_change()  local
207 	while ((cfg_data->prate * 1000) != ndata->new_rate) {  in exynos_cpuclk_pre_rate_change()
208 		if (cfg_data->prate == 0)  in exynos_cpuclk_pre_rate_change()
210 		cfg_data++;  in exynos_cpuclk_pre_rate_change()
220 	div0 = cfg_data->div0;  in exynos_cpuclk_pre_rate_change()
222 		div1 = cfg_data->div1;  in exynos_cpuclk_pre_rate_change()
278 	const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg;  in exynos_cpuclk_post_rate_change()  local
287 		while ((cfg_data->prate * 1000) != ndata->new_rate) {  in exynos_cpuclk_post_rate_change()
288 			if (cfg_data->prate == 0)  in exynos_cpuclk_post_rate_change()
290 			cfg_data++;  in exynos_cpuclk_post_rate_change()
302 		div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK);  in exynos_cpuclk_post_rate_change()
326 	const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg;  in exynos5433_cpuclk_pre_rate_change()  local
334 	while ((cfg_data->prate * 1000) != ndata->new_rate) {  in exynos5433_cpuclk_pre_rate_change()
335 		if (cfg_data->prate == 0)  in exynos5433_cpuclk_pre_rate_change()
337 		cfg_data++;  in exynos5433_cpuclk_pre_rate_change()
346 	div0 = cfg_data->div0;  in exynos5433_cpuclk_pre_rate_change()
347 	div1 = cfg_data->div1;  in exynos5433_cpuclk_pre_rate_change()
481 	const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg;  in exynos850_cpuclk_pre_rate_change()  local
495 	while ((cfg_data->prate * 1000) != ndata->new_rate) {  in exynos850_cpuclk_pre_rate_change()
496 		if (cfg_data->prate == 0)  in exynos850_cpuclk_pre_rate_change()
498 		cfg_data++;  in exynos850_cpuclk_pre_rate_change()
526 		unsigned long div = (cfg_data->div0 >> shifts[i]) & 0xf;  in exynos850_cpuclk_pre_rate_change()