clk/rockchip/clk-rk3576.c

1 // SPDX-License-Identifier: GPL-2.0
4  * Author: Elaine Zhang <zhangqing@rock-chips.com>
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
117 	.val = HIWORD_UPDATE(_amcore - 1, RK3576_ACLK_M_BIGCORE_DIV_MASK,	\
124 	.val = HIWORD_UPDATE(_amcore - 1, RK3576_ACLK_M_LITCORE_DIV_MASK,	\
131 	.val = HIWORD_UPDATE(_pclkdbg - 1, RK3576_PCLK_DBG_LITCORE_DIV_MASK,	\
140 	       HIWORD_UPDATE(_div - 1, RK3576_ACLK_CCI_DIV_MASK,		\
388 	 * CRU Clock-Architecture
1733 	grf = syscon_regmap_lookup_by_compatible("rockchip,rk3576-pmu0-grf");  in rk3576_clk_init()
1741 		pr_err("%s: could not map cru region\n", __func__);  in rk3576_clk_init()
1752 	ctx->grf = grf;  in rk3576_clk_init()
1777 CLK_OF_DECLARE(rk3576_cru, "rockchip,rk3576-cru", rk3576_clk_init);
1789 		.compatible = "rockchip,rk3576-cru",
1798 	struct device *dev = &pdev->dev;  in clk_rk3576_probe()
1802 		return -EINVAL;  in clk_rk3576_probe()
1804 	if (init_data->inits)  in clk_rk3576_probe()
1805 		init_data->inits(dev->of_node);  in clk_rk3576_probe()
1813 		.name	= "clk-rk3576",