clk/rockchip/clk-rk3399.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
4  * Author: Xing Zheng <zhengxing@rock-chips.com>
7 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/rk3399-cru.h>
402 	 * CRU Clock-Architecture
1254 	 * pclkin_cifinv --|-------\
1255 	 *                 |GSC20_9|-- pclkin_cifmux -- |G27_6| -- pclkin_isp1_wrapper
1256 	 * pclkin_cif    --|-------/
1302 	/* Watchdog pclk is controlled by RK3399 SECURE_GRF_SOC_CON3[8]. */
1404 	 * PMU CRU Clock-Architecture
1553 				   ARRAY_SIZE(rk3399_pll_clks), -1);  in rk3399_clk_init()
1578 CLK_OF_DECLARE(rk3399_cru, "rockchip,rk3399-cru", rk3399_clk_init);
1602 				   ARRAY_SIZE(rk3399_pmu_pll_clks), -1);  in rk3399_pmu_clk_init()
1615 CLK_OF_DECLARE(rk3399_cru_pmu, "rockchip,rk3399-pmucru", rk3399_pmu_clk_init);
1631 		.compatible = "rockchip,rk3399-cru",
1634 		.compatible = "rockchip,rk3399-pmucru",
1642 	struct device_node *np = pdev->dev.of_node;  in clk_rk3399_probe()
1645 	init_data = device_get_match_data(&pdev->dev);  in clk_rk3399_probe()
1646 	if (init_data->inits)  in clk_rk3399_probe()
1647 		init_data->inits(np);  in clk_rk3399_probe()
1654 		.name	= "clk-rk3399",