Lines Matching +full:5 +full:- +full:8
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Author: Xing Zheng <zhengxing@rock-chips.com>
7 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/rk3399-cru.h>
91 RK3036_PLL_RATE( 533250000, 8, 711, 4, 1, 1, 0),
220 RK3399_PLL_CON(3), 8, 31, 0, rk3399_pll_rates),
221 [bpll] = PLL(pll_rk3399, PLL_APLLB, "bpll", mux_pll_p, 0, RK3399_PLL_CON(8),
222 RK3399_PLL_CON(11), 8, 31, 0, rk3399_pll_rates),
224 RK3399_PLL_CON(19), 8, 31, 0, NULL),
226 RK3399_PLL_CON(27), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
228 RK3399_PLL_CON(35), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
230 RK3399_PLL_CON(43), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
232 RK3399_PLL_CON(51), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
237 RK3399_PMU_PLL_CON(3), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
251 RK3399_CLKSEL_CON(28), 8, 2, MFLAGS);
255 RK3399_CLKSEL_CON(29), 8, 2, MFLAGS);
259 RK3399_CLKSEL_CON(30), 8, 2, MFLAGS);
263 RK3399_CLKSEL_CON(33), 8, 2, MFLAGS);
267 RK3399_CLKSEL_CON(34), 8, 2, MFLAGS);
271 RK3399_CLKSEL_CON(35), 8, 2, MFLAGS);
275 RK3399_CLKSEL_CON(36), 8, 2, MFLAGS);
279 RK3399_PMU_CLKSEL_CON(5), 8, 2, MFLAGS);
316 #define RK3399_DIV_ACLKM_SHIFT 8
320 #define RK3399_DIV_PCLK_DBG_SHIFT 8
358 RK3399_CPUCLKL_RATE(1800000000, 1, 8, 8),
359 RK3399_CPUCLKL_RATE(1704000000, 1, 8, 8),
364 RK3399_CPUCLKL_RATE(1200000000, 1, 5, 5),
365 RK3399_CPUCLKL_RATE(1008000000, 1, 5, 5),
383 RK3399_CPUCLKB_RATE(1800000000, 1, 8, 8),
384 RK3399_CPUCLKB_RATE(1704000000, 1, 8, 8),
389 RK3399_CPUCLKB_RATE(1200000000, 1, 5, 5),
390 RK3399_CPUCLKB_RATE(1008000000, 1, 5, 5),
402 * CRU Clock-Architecture
407 RK3399_CLKGATE_CON(6), 5, GFLAGS),
426 RK3399_CLKSEL_CON(39), 6, 2, MFLAGS, 0, 5, DFLAGS,
453 RK3399_CLKSEL_CON(64), 15, 1, MFLAGS, 8, 5, DFLAGS,
457 RK3399_CLKSEL_CON(64), 6, 2, MFLAGS, 0, 5, DFLAGS,
458 RK3399_CLKGATE_CON(13), 5, GFLAGS),
461 RK3399_CLKSEL_CON(65), 15, 1, MFLAGS, 8, 5, DFLAGS,
465 RK3399_CLKSEL_CON(65), 6, 2, MFLAGS, 0, 5, DFLAGS,
479 RK3399_CLKSEL_CON(0), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
482 RK3399_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
483 RK3399_CLKGATE_CON(0), 5, GFLAGS),
485 RK3399_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
513 RK3399_CLKSEL_CON(2), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
516 RK3399_CLKSEL_CON(3), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
517 RK3399_CLKGATE_CON(1), 5, GFLAGS),
519 RK3399_CLKSEL_CON(3), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
523 RK3399_CLKGATE_CON(14), 5, GFLAGS),
547 RK3399_CLKGATE_CON(6), 8, GFLAGS),
549 RK3399_CLKSEL_CON(20), 7, 1, MFLAGS, 0, 5, DFLAGS,
560 RK3399_CLKSEL_CON(19), 8, 3, DFLAGS,
568 RK3399_CLKSEL_CON(20), 14, 2, MFLAGS, 8, 5, DFLAGS,
569 RK3399_CLKGATE_CON(5), 5, GFLAGS),
574 RK3399_CLKGATE_CON(5), 6, GFLAGS),
576 RK3399_CLKGATE_CON(5), 7, GFLAGS),
578 RK3399_CLKGATE_CON(5), 8, GFLAGS),
580 RK3399_CLKGATE_CON(5), 9, GFLAGS),
585 RK3399_CLKGATE_CON(8), 13, GFLAGS),
588 RK3399_CLKGATE_CON(8), 14, GFLAGS,
591 RK3399_CLKGATE_CON(8), 15, GFLAGS),
594 RK3399_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
599 RK3399_CLKGATE_CON(8), 3, GFLAGS),
602 RK3399_CLKGATE_CON(8), 4, GFLAGS,
605 RK3399_CLKGATE_CON(8), 5, GFLAGS),
609 RK3399_CLKGATE_CON(8), 6, GFLAGS),
612 RK3399_CLKGATE_CON(8), 7, GFLAGS,
615 RK3399_CLKGATE_CON(8), 8, GFLAGS),
619 RK3399_CLKGATE_CON(8), 9, GFLAGS),
622 RK3399_CLKGATE_CON(8), 10, GFLAGS,
625 RK3399_CLKGATE_CON(8), 11, GFLAGS),
631 RK3399_CLKGATE_CON(8), 12, GFLAGS),
659 RK3399_CLKGATE_CON(9), 5, GFLAGS,
671 RK3399_CLKSEL_CON(6), 15, 1, MFLAGS, 8, 5, DFLAGS,
686 RK3399_CLKGATE_CON(3), 5, GFLAGS),
701 RK3399_CLKSEL_CON(5), 6, 2, MFLAGS, 0, 5, DFLAGS,
718 RK3399_CLKGATE_CON(2), 5, GFLAGS),
722 RK3399_CLKSEL_CON(5), 15, 2, MFLAGS, 8, 5, DFLAGS,
726 RK3399_CLKGATE_CON(2), 8, GFLAGS),
732 RK3399_CLKSEL_CON(4), 6, 2, MFLAGS, 0, 5, DFLAGS),
734 RK3399_CLKGATE_CON(15), 5, GFLAGS),
740 RK3399_CLKSEL_CON(7), 6, 2, MFLAGS, 0, 5, DFLAGS,
743 RK3399_CLKSEL_CON(7), 8, 5, DFLAGS,
757 RK3399_CLKSEL_CON(9), 6, 2, MFLAGS, 0, 5, DFLAGS,
760 RK3399_CLKSEL_CON(9), 14, 2, MFLAGS, 8, 5, DFLAGS,
761 RK3399_CLKGATE_CON(4), 5, GFLAGS),
764 RK3399_CLKSEL_CON(8), 6, 2, MFLAGS, 0, 5, DFLAGS,
767 RK3399_CLKSEL_CON(8), 8, 5, DFLAGS,
775 RK3399_CLKGATE_CON(17), 8, GFLAGS),
781 RK3399_CLKSEL_CON(10), 6, 2, MFLAGS, 0, 5, DFLAGS,
784 RK3399_CLKSEL_CON(10), 8, 5, DFLAGS,
798 RK3399_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 5, DFLAGS,
802 RK3399_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 5, DFLAGS,
803 RK3399_CLKGATE_CON(4), 8, GFLAGS),
805 RK3399_CLKSEL_CON(11), 8, 5, DFLAGS,
813 RK3399_CLKGATE_CON(16), 8, GFLAGS),
819 RK3399_CLKSEL_CON(12), 14, 2, MFLAGS, 8, 5, DFLAGS,
828 RK3399_CLKSEL_CON(13), 5, 3, MFLAGS, 0, 5, DFLAGS,
831 RK3399_CLKGATE_CON(30), 8, GFLAGS),
841 RK3399_CLKGATE_CON(5), 1, GFLAGS),
843 RK3399_CLKGATE_CON(5), 0, GFLAGS),
845 RK3399_CLKSEL_CON(14), 7, 1, MFLAGS, 0, 5, DFLAGS,
846 RK3399_CLKGATE_CON(5), 2, GFLAGS),
848 RK3399_CLKSEL_CON(14), 8, 2, DFLAGS,
849 RK3399_CLKGATE_CON(5), 3, GFLAGS),
852 RK3399_CLKGATE_CON(5), 4, GFLAGS),
862 RK3399_CLKGATE_CON(20), 5, GFLAGS),
868 RK3399_CLKGATE_CON(20), 8, GFLAGS),
883 RK3399_CLKGATE_CON(31), 8, GFLAGS),
887 RK3399_CLKSEL_CON(13), 15, 1, MFLAGS, 8, 5, DFLAGS,
890 RK3399_CLKGATE_CON(33), 8, GFLAGS),
895 RK3399_CLKSEL_CON(15), 8, 3, MFLAGS, 0, 7, DFLAGS,
899 RK3399_CLKSEL_CON(16), 8, 3, MFLAGS, 0, 7, DFLAGS,
910 RK3399_CLKSEL_CON(17), 8, 3, MFLAGS, 0, 7, DFLAGS,
914 RK3399_CLKSEL_CON(18), 11, 5, DFLAGS,
920 RK3399_CLKSEL_CON(18), 8, 2, MFLAGS, 0, 7, DFLAGS,
927 RK3399_CLKSEL_CON(22), 8, 3, MFLAGS, 0, 7, DFLAGS,
935 RK3399_CLKSEL_CON(21), 7, 1, MFLAGS, 0, 5, DFLAGS),
937 RK3399_CLKGATE_CON(32), 8, GFLAGS),
949 RK3399_CLKSEL_CON(23), 7, 1, MFLAGS, 0, 5, DFLAGS,
952 RK3399_CLKSEL_CON(23), 8, 2, DFLAGS,
964 …GATE(SCLK_INTMEM3, "clk_intmem3", "aclk_perilp0", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(23), 5, GF…
967 GATE(ACLK_DCF, "aclk_dcf", "aclk_perilp0", 0, RK3399_CLKGATE_CON(23), 8, GFLAGS),
968 GATE(ACLK_DMAC0_PERILP, "aclk_dmac0_perilp", "aclk_perilp0", 0, RK3399_CLKGATE_CON(25), 5, GFLAGS),
974 GATE(HCLK_M_CRYPTO0, "hclk_m_crypto0", "hclk_perilp0", 0, RK3399_CLKGATE_CON(24), 5, GFLAGS),
978 …LP0_NOC, "hclk_perilp0_noc", "hclk_perilp0", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(25), 8, GFLAGS),
985 RK3399_CLKSEL_CON(24), 6, 2, MFLAGS, 0, 5, DFLAGS,
989 RK3399_CLKSEL_CON(26), 6, 2, MFLAGS, 0, 5, DFLAGS,
990 RK3399_CLKGATE_CON(7), 8, GFLAGS),
996 RK3399_CLKGATE_CON(7), 5, GFLAGS),
998 RK3399_CLKSEL_CON(24), 15, 1, MFLAGS, 8, 5, DFLAGS,
1002 GATE(SCLK_M0_PERILP, "sclk_m0_perilp", "fclk_cm0s", 0, RK3399_CLKGATE_CON(24), 8, GFLAGS),
1010 RK3399_CLKGATE_CON(8), 1, GFLAGS),
1012 RK3399_CLKGATE_CON(8), 0, GFLAGS),
1014 RK3399_CLKSEL_CON(25), 7, 1, MFLAGS, 0, 5, DFLAGS),
1016 RK3399_CLKSEL_CON(25), 8, 3, DFLAGS,
1017 RK3399_CLKGATE_CON(8), 2, GFLAGS),
1027 GATE(PCLK_SPI5, "pclk_spi5", "hclk_perilp1", 0, RK3399_CLKGATE_CON(34), 5, GFLAGS),
1035 GATE(PCLK_I2C7, "pclk_rki2c7", "pclk_perilp1", 0, RK3399_CLKGATE_CON(22), 5, GFLAGS),
1038 GATE(PCLK_I2C6, "pclk_rki2c6", "pclk_perilp1", 0, RK3399_CLKGATE_CON(22), 8, GFLAGS),
1055 RK3399_CLKSEL_CON(26), 8, 8, DFLAGS,
1067 RK3399_CLKSEL_CON(38), 5, 1, MFLAGS, 0, 5, DFLAGS,
1073 RK3399_CLKSEL_CON(38), 13, 1, MFLAGS, 8, 5, DFLAGS,
1078 RK3399_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
1081 RK3399_CLKSEL_CON(43), 0, 5, DFLAGS,
1096 RK3399_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
1099 RK3399_CLKSEL_CON(43), 5, 5, DFLAGS,
1102 RK3399_CLKSEL_CON(43), 10, 5, DFLAGS,
1111 RK3399_CLKGATE_CON(29), 5, GFLAGS),
1122 RK3399_CLKGATE_CON(29), 8, GFLAGS),
1128 RK3399_CLKSEL_CON(46), 6, 2, MFLAGS, 0, 5, DFLAGS,
1129 RK3399_CLKGATE_CON(11), 8, GFLAGS),
1132 RK3399_CLKSEL_CON(44), 15, 1, MFLAGS, 8, 6, DFLAGS,
1149 RK3399_CLKSEL_CON(47), 6, 2, MFLAGS, 0, 5, DFLAGS,
1150 RK3399_CLKGATE_CON(10), 8, GFLAGS),
1152 RK3399_CLKSEL_CON(47), 8, 5, DFLAGS,
1166 RK3399_CLKSEL_CON(49), 8, 2, MFLAGS, 0, 8, DFLAGS,
1174 RK3399_CLKSEL_CON(51), 6, 2, MFLAGS, 0, 5, DFLAGS,
1179 RK3399_CLKSEL_CON(48), 6, 2, MFLAGS, 0, 5, DFLAGS,
1182 RK3399_CLKSEL_CON(48), 8, 5, DFLAGS,
1188 RK3399_CLKGATE_CON(28), 5, GFLAGS),
1196 RK3399_CLKSEL_CON(50), 8, 2, MFLAGS, 0, 8, DFLAGS,
1204 RK3399_CLKSEL_CON(52), 6, 2, MFLAGS, 0, 5, DFLAGS,
1209 RK3399_CLKSEL_CON(53), 6, 2, MFLAGS, 0, 5, DFLAGS,
1210 RK3399_CLKGATE_CON(12), 8, GFLAGS),
1212 RK3399_CLKSEL_CON(53), 8, 5, DFLAGS,
1218 RK3399_CLKGATE_CON(27), 5, GFLAGS),
1228 RK3399_CLKSEL_CON(55), 6, 2, MFLAGS, 0, 5, DFLAGS,
1232 RK3399_CLKSEL_CON(54), 6, 2, MFLAGS, 0, 5, DFLAGS,
1235 RK3399_CLKSEL_CON(54), 8, 5, DFLAGS,
1244 RK3399_CLKGATE_CON(27), 8, GFLAGS),
1247 RK3399_CLKSEL_CON(55), 14, 2, MFLAGS, 8, 5, DFLAGS,
1248 RK3399_CLKGATE_CON(11), 5, GFLAGS),
1254 * pclkin_cifinv --|-------\
1255 * |GSC20_9|-- pclkin_cifmux -- |G27_6| -- pclkin_isp1_wrapper
1256 * pclkin_cif --|-------/
1267 RK3399_CLKSEL_CON(56), 5, 1, MFLAGS, 0, 5, DFLAGS),
1271 RK3399_CLKSEL_CON(56), 15, 1, MFLAGS, 8, 5, DFLAGS,
1279 …lk_gic_adb400_gic_2_core_b", "aclk_gic_pre", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(33), 5, GFLAGS),
1284 RK3399_CLKSEL_CON(57), 0, 5, DFLAGS),
1287 …TCPHY_G, "pclk_uphy0_tcphy_g", "pclk_alive", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(21), 5, GFLAGS),
1289 …TCPHY_G, "pclk_uphy1_tcphy_g", "pclk_alive", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(21), 8, GFLAGS),
1296 GATE(PCLK_GPIO4, "pclk_gpio4", "pclk_alive", 0, RK3399_CLKGATE_CON(31), 5, GFLAGS),
1302 /* Watchdog pclk is controlled by RK3399 SECURE_GRF_SOC_CON3[8]. */
1329 RK3399_CLKSEL_CON(59), 15, 1, MFLAGS, 8, 7, DFLAGS,
1337 RK3399_CLKSEL_CON(60), 15, 1, MFLAGS, 8, 7, DFLAGS,
1341 RK3399_CLKSEL_CON(58), 15, 1, MFLAGS, 8, 7, DFLAGS,
1358 RK3399_CLKSEL_CON(61), 15, 1, MFLAGS, 8, 7, DFLAGS,
1362 RK3399_CLKSEL_CON(62), 15, 1, MFLAGS, 8, 7, DFLAGS,
1366 RK3399_CLKSEL_CON(63), 15, 1, MFLAGS, 8, 7, DFLAGS,
1367 RK3399_CLKGATE_CON(10), 5, GFLAGS),
1375 GATE(SCLK_TIMER05, "clk_timer05", "xin24m", 0, RK3399_CLKGATE_CON(26), 5, GFLAGS),
1378 GATE(SCLK_TIMER08, "clk_timer08", "xin24m", 0, RK3399_CLKGATE_CON(26), 8, GFLAGS),
1386 RK3399_CLKSEL_CON(58), 0, 5, DFLAGS,
1404 * PMU CRU Clock-Architecture
1411 RK3399_PMU_CLKSEL_CON(0), 15, 1, MFLAGS, 8, 5, DFLAGS),
1418 RK3399_PMU_CLKSEL_CON(1), 13, 1, MFLAGS, 8, 5, DFLAGS,
1419 RK3399_PMU_CLKGATE_CON(0), 8, GFLAGS),
1437 RK3399_PMU_CLKSEL_CON(2), 8, 7, DFLAGS,
1446 RK3399_PMU_CLKSEL_CON(5), 10, 1, MFLAGS, 0, 7, DFLAGS,
1447 RK3399_PMU_CLKGATE_CON(0), 5, GFLAGS),
1455 RK3399_PMU_CLKSEL_CON(0), 0, 5, DFLAGS),
1468 …GRF_PMU, "pclk_sgrf_pmu", "pclk_pmu_src", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(1), 5, GFLAGS),
1471 GATE(PCLK_I2C4_PMU, "pclk_i2c4_pmu", "pclk_pmu_src", 0, RK3399_PMU_CLKGATE_CON(1), 8, GFLAGS),
1484 …PMU, "hclk_noc_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 5, GFLAGS),
1553 ARRAY_SIZE(rk3399_pll_clks), -1); in rk3399_clk_init()
1578 CLK_OF_DECLARE(rk3399_cru, "rockchip,rk3399-cru", rk3399_clk_init);
1602 ARRAY_SIZE(rk3399_pmu_pll_clks), -1); in rk3399_pmu_clk_init()
1615 CLK_OF_DECLARE(rk3399_cru_pmu, "rockchip,rk3399-pmucru", rk3399_pmu_clk_init);
1631 .compatible = "rockchip,rk3399-cru",
1634 .compatible = "rockchip,rk3399-pmucru",
1642 struct device_node *np = pdev->dev.of_node; in clk_rk3399_probe()
1645 init_data = device_get_match_data(&pdev->dev); in clk_rk3399_probe()
1646 if (init_data->inits) in clk_rk3399_probe()
1647 init_data->inits(np); in clk_rk3399_probe()
1654 .name = "clk-rk3399",