Lines Matching refs:RK3288_CLKSEL_CON
137 .reg = RK3288_CLKSEL_CON(0), \
145 .reg = RK3288_CLKSEL_CON(37), \
182 .core_reg[0] = RK3288_CLKSEL_CON(0),
252 RK3288_CLKSEL_CON(4), 8, 2, MFLAGS);
256 RK3288_CLKSEL_CON(5), 8, 2, MFLAGS);
260 RK3288_CLKSEL_CON(40), 8, 2, MFLAGS);
264 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS);
268 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS);
272 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS);
276 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS);
280 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS);
293 RK3288_CLKSEL_CON(36), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
296 RK3288_CLKSEL_CON(36), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
299 RK3288_CLKSEL_CON(36), 8, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
302 RK3288_CLKSEL_CON(36), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
305 RK3288_CLKSEL_CON(37), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
308 RK3288_CLKSEL_CON(0), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
311 RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
314 RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
317 RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
331 RK3288_CLKSEL_CON(26), 2, 1, MFLAGS, 0, 2,
339 RK3288_CLKSEL_CON(1), 15, 1, MFLAGS, 3, 5, DFLAGS),
341 RK3288_CLKSEL_CON(1), 0, 3, DFLAGS),
345 RK3288_CLKSEL_CON(1), 12, 3, DFLAGS,
348 RK3288_CLKSEL_CON(1), 8, 2, DFLAGS, div_hclk_cpu_t,
353 RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
361 RK3288_CLKSEL_CON(4), 15, 1, MFLAGS, 0, 7, DFLAGS,
364 RK3288_CLKSEL_CON(8), 0,
368 RK3288_CLKSEL_CON(4), 12, 1, MFLAGS,
374 RK3288_CLKSEL_CON(5), 15, 1, MFLAGS),
376 RK3288_CLKSEL_CON(5), 0, 7, DFLAGS,
379 RK3288_CLKSEL_CON(9), 0,
385 RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,
388 RK3288_CLKSEL_CON(41), 0,
415 RK3288_CLKSEL_CON(32), 6, 2, MFLAGS, 0, 5, DFLAGS,
418 RK3288_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS,
432 RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS,
435 RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFLAGS,
439 RK3288_CLKSEL_CON(30), 6, 2, MFLAGS, 0, 5, DFLAGS,
442 RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
446 RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
449 RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
453 RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
456 RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
460 RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
463 RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
472 RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
475 RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
478 RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
481 RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
485 RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
488 RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
491 RK3288_CLKSEL_CON(33), 8, 5, DFLAGS),
493 RK3288_CLKSEL_CON(33), 0, 5, DFLAGS,
497 RK3288_CLKSEL_CON(34), 6, 2, MFLAGS, 0, 5, DFLAGS,
501 RK3288_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
504 RK3288_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
507 RK3288_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
517 RK3288_CLKSEL_CON(25), 7, 1, MFLAGS, 0, 7, DFLAGS,
520 RK3288_CLKSEL_CON(25), 15, 1, MFLAGS, 8, 7, DFLAGS,
523 RK3288_CLKSEL_CON(39), 7, 1, MFLAGS, 0, 7, DFLAGS,
527 RK3288_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 6, DFLAGS,
530 RK3288_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 6, DFLAGS,
533 RK3288_CLKSEL_CON(34), 14, 2, MFLAGS, 8, 6, DFLAGS,
536 RK3288_CLKSEL_CON(12), 14, 2, MFLAGS, 8, 6, DFLAGS,
552 RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
555 RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
568 RK3288_CLKSEL_CON(2), 0, 6, DFLAGS,
572 RK3288_CLKSEL_CON(24), 8, 8, DFLAGS,
579 RK3288_CLKSEL_CON(38), 7, 1, MFLAGS, 0, 5, DFLAGS,
582 RK3288_CLKSEL_CON(38), 15, 1, MFLAGS, 8, 5, DFLAGS,
586 RK3288_CLKSEL_CON(13), 13, 2, MFLAGS, 0, 7, DFLAGS,
589 RK3288_CLKSEL_CON(17), 0,
593 RK3288_CLKSEL_CON(13), 15, 1, MFLAGS),
595 RK3288_CLKSEL_CON(14), 0, 7, DFLAGS,
598 RK3288_CLKSEL_CON(18), 0,
602 RK3288_CLKSEL_CON(15), 0, 7, DFLAGS,
605 RK3288_CLKSEL_CON(19), 0,
609 RK3288_CLKSEL_CON(16), 0, 7, DFLAGS,
612 RK3288_CLKSEL_CON(20), 0,
616 RK3288_CLKSEL_CON(3), 0, 7, DFLAGS,
619 RK3288_CLKSEL_CON(7), 0,
624 RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
627 RK3288_CLKSEL_CON(21), 4, 1, MFLAGS),
638 RK3288_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
641 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
643 RK3288_CLKSEL_CON(22), 7, IFLAGS),
649 RK3288_CLKSEL_CON(13), 11, 2, MFLAGS,
652 RK3288_CLKSEL_CON(29), 0, 2, MFLAGS,
657 RK3288_CLKSEL_CON(11), 8, 6, DFLAGS),
659 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
821 INVERTER(0, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
823 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
828 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
833 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
862 RK3288_CLKSEL_CON(0),
863 RK3288_CLKSEL_CON(1),
864 RK3288_CLKSEL_CON(10),
865 RK3288_CLKSEL_CON(33),
866 RK3288_CLKSEL_CON(37),