clk/rockchip/clk-rk3288.c

24 	apll, dpll, cpll, gpll, npll,  enumerator
197 PNAME(mux_pll_src_cpll_gpll_p)		= { "cpll", "gpll" };
198 PNAME(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
199 PNAME(mux_pll_src_cpll_gpll_npll_p)	= { "cpll", "gpll", "npll" };
200 PNAME(mux_pll_src_cpll_gpll_usb480m_p)	= { "cpll", "gpll", "unstable:usbphy480m_src" };
201 PNAME(mux_pll_src_cpll_gll_usb_npll_p)	= { "cpll", "gpll", "unstable:usbphy480m_src", "npll" };
203 PNAME(mux_mmc_src_p)	= { "cpll", "gpll", "xin24m", "xin24m" };
217 PNAME(mux_tspout_p)	= { "cpll", "gpll", "npll", "xin27m" };
222 PNAME(mux_hsicphy480m_p)	= { "cpll", "gpll", "usbphy480m_src" };
232 	[gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
289 	GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
328 	GATE(0, "gpll_ddr", "gpll", 0,
334 	GATE(0, "gpll_aclk_cpu", "gpll", CLK_IGNORE_UNUSED,
490 	DIV(0, "pclk_pd_alive", "gpll", 0,
492 	COMPOSITE_NOMUX(0, "pclk_pd_pmu", "gpll", CLK_IGNORE_UNUSED,
896 	 * put APLL, CPLL, and GPLL into slow mode at resume time  in rk3288_clk_suspend()