clk/rockchip/clk-rk3228.c

19 	apll, dpll, cpll, gpll,  enumerator
141 PNAME(mux_pll_src_4plls_p)	= { "cpll", "gpll", "hdmiphy", "usb480m" };
142 PNAME(mux_pll_src_3plls_p)	= { "cpll", "gpll", "hdmiphy" };
143 PNAME(mux_pll_src_2plls_p)	= { "cpll", "gpll" };
144 PNAME(mux_sclk_hdmi_cec_p)	= { "cpll", "gpll", "xin24m" };
146 PNAME(mux_mmc_src_p)		= { "cpll", "gpll", "xin24m", "usb480m" };
147 PNAME(mux_pll_src_cpll_gpll_usb480m_p)	= { "cpll", "gpll", "usb480m" };
149 PNAME(mux_sclk_rga_p)		= { "gpll", "cpll", "sclk_rga_src" };
175 	[gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
224 	GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED,
239 	GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
259 	GATE(0, "gpll_aclk_cpu", "gpll", CLK_IGNORE_UNUSED,
339 	GATE(0, "gpll_peri", "gpll", CLK_IGNORE_UNUSED,
402 	GATE(0, "gpll_vop", "gpll", 0,