clk/rockchip/clk-rk3188.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/rk3188-cru-common.h>
277 	 * Clock-Architecture Diagram 2
385 	 * Clock-Architecture Diagram 4
769 		pr_err("%s: could not map cru region\n", __func__);  in rk3188_common_clk_init()
770 		return ERR_PTR(-ENOMEM);  in rk3188_common_clk_init()
779 		return ERR_PTR(-ENOMEM);  in rk3188_common_clk_init()
817 CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init);
864 CLK_OF_DECLARE(rk3188a_cru, "rockchip,rk3188a-cru", rk3188a_clk_init);
874 		if (!pll->rate_table)  in rk3188_clk_init()
877 		rate = pll->rate_table;  in rk3188_clk_init()
878 		while (rate->rate > 0) {  in rk3188_clk_init()
879 			rate->nb = 1;  in rk3188_clk_init()
886 CLK_OF_DECLARE(rk3188_cru, "rockchip,rk3188-cru", rk3188_clk_init);