1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/clk-provider.h>
15 	void __iomem	*reg;  member
30 	val = readl(inv_clock->reg) >> inv_clock->shift;  in rockchip_inv_get_phase()
45 		return -EINVAL;  in rockchip_inv_set_phase()
48 	if (inv_clock->flags & ROCKCHIP_INVERTER_HIWORD_MASK) {  in rockchip_inv_set_phase()
49 		writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift),  in rockchip_inv_set_phase()
50 		       inv_clock->reg);  in rockchip_inv_set_phase()
53 		u32 reg;  in rockchip_inv_set_phase()  local
55 		spin_lock_irqsave(inv_clock->lock, flags);  in rockchip_inv_set_phase()
57 		reg = readl(inv_clock->reg);  in rockchip_inv_set_phase()
58 		reg &= ~BIT(inv_clock->shift);  in rockchip_inv_set_phase()
59 		reg |= val;  in rockchip_inv_set_phase()
60 		writel(reg, inv_clock->reg);  in rockchip_inv_set_phase()
62 		spin_unlock_irqrestore(inv_clock->lock, flags);  in rockchip_inv_set_phase()
75 				void __iomem *reg, int shift, int flags,  in rockchip_clk_register_inverter()  argument
78 	struct clk_init_data init;  in rockchip_clk_register_inverter()  local
84 		return ERR_PTR(-ENOMEM);  in rockchip_clk_register_inverter()
86 	init.name = name;  in rockchip_clk_register_inverter()
87 	init.num_parents = num_parents;  in rockchip_clk_register_inverter()
88 	init.flags = CLK_SET_RATE_PARENT;  in rockchip_clk_register_inverter()
89 	init.parent_names = parent_names;  in rockchip_clk_register_inverter()
90 	init.ops = &rockchip_inv_clk_ops;  in rockchip_clk_register_inverter()
92 	inv_clock->hw.init = &init;  in rockchip_clk_register_inverter()
93 	inv_clock->reg = reg;  in rockchip_clk_register_inverter()
94 	inv_clock->shift = shift;  in rockchip_clk_register_inverter()
95 	inv_clock->flags = flags;  in rockchip_clk_register_inverter()
96 	inv_clock->lock = lock;  in rockchip_clk_register_inverter()
98 	clk = clk_register(NULL, &inv_clock->hw);  in rockchip_clk_register_inverter()