104 struct div_hw_data {  struct
112 #define to_div_hw_data(_hw)	container_of(_hw, struct div_hw_data, hw_data)  argument
225 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_cpg_div_clk_notifier()  local
233 	if (event != PRE_RATE_CHANGE || !div_hw_data->invalid_rate ||  in rzg3s_cpg_div_clk_notifier()
234 	    div_hw_data->invalid_rate % cnd->new_rate)  in rzg3s_cpg_div_clk_notifier()
287 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_div_clk_recalc_rate()  local
295 	return divider_recalc_rate(hw, parent_rate, val, div_hw_data->dtable,  in rzg3s_div_clk_recalc_rate()
296 				   CLK_DIVIDER_ROUND_CLOSEST, div_hw_data->width);  in rzg3s_div_clk_recalc_rate()
302 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_div_clk_determine_rate()  local
304 	if (div_hw_data->max_rate && req->rate > div_hw_data->max_rate)  in rzg3s_div_clk_determine_rate()
305 		req->rate = div_hw_data->max_rate;  in rzg3s_div_clk_determine_rate()
307 	return divider_determine_rate(hw, req, div_hw_data->dtable, div_hw_data->width,  in rzg3s_div_clk_determine_rate()
315 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_div_clk_set_rate()  local
323 	val = divider_get_val(rate, parent_rate, div_hw_data->dtable, div_hw_data->width,  in rzg3s_div_clk_set_rate()
344 	struct div_hw_data *div_hw_data;  in rzg3s_cpg_div_clk_register()  local
359 	div_hw_data = devm_kzalloc(priv->dev, sizeof(*div_hw_data), GFP_KERNEL);  in rzg3s_cpg_div_clk_register()
360 	if (!div_hw_data)  in rzg3s_cpg_div_clk_register()
375 	div_hw_data->hw_data.priv = priv;  in rzg3s_cpg_div_clk_register()
376 	div_hw_data->hw_data.conf = core->conf;  in rzg3s_cpg_div_clk_register()
377 	div_hw_data->hw_data.sconf = core->sconf;  in rzg3s_cpg_div_clk_register()
378 	div_hw_data->dtable = core->dtable;  in rzg3s_cpg_div_clk_register()
379 	div_hw_data->invalid_rate = core->invalid_rate;  in rzg3s_cpg_div_clk_register()
380 	div_hw_data->max_rate = core->max_rate;  in rzg3s_cpg_div_clk_register()
381 	div_hw_data->width = fls(max) - 1;  in rzg3s_cpg_div_clk_register()
383 	clk_hw = &div_hw_data->hw_data.hw;  in rzg3s_cpg_div_clk_register()