75 struct clk_hw_data {  struct
82 #define to_clk_hw_data(_hw)	container_of(_hw, struct clk_hw_data, hw)  argument
90 	struct clk_hw_data hw_data;
105 	struct clk_hw_data hw_data;
181 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg2l_cpg_sd_clk_mux_notifier()  local
182 	struct rzg2l_cpg_priv *priv = clk_hw_data->priv;  in rzg2l_cpg_sd_clk_mux_notifier()
183 	u32 off = GET_REG_OFFSET(clk_hw_data->conf);  in rzg2l_cpg_sd_clk_mux_notifier()
184 	u32 shift = GET_SHIFT(clk_hw_data->conf);  in rzg2l_cpg_sd_clk_mux_notifier()
209 	ret = rzg2l_cpg_wait_clk_update_done(priv->base, clk_hw_data->sconf);  in rzg2l_cpg_sd_clk_mux_notifier()
224 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg3s_cpg_div_clk_notifier()  local
225 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_cpg_div_clk_notifier()
226 	struct rzg2l_cpg_priv *priv = clk_hw_data->priv;  in rzg3s_cpg_div_clk_notifier()
227 	u32 off = GET_REG_OFFSET(clk_hw_data->conf);  in rzg3s_cpg_div_clk_notifier()
228 	u32 shift = GET_SHIFT(clk_hw_data->conf);  in rzg3s_cpg_div_clk_notifier()
241 	val &= GENMASK(GET_WIDTH(clk_hw_data->conf) - 1, 0);  in rzg3s_cpg_div_clk_notifier()
255 		ret = rzg2l_cpg_wait_clk_update_done(priv->base, clk_hw_data->sconf);  in rzg3s_cpg_div_clk_notifier()
286 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg3s_div_clk_recalc_rate()  local
287 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_div_clk_recalc_rate()
288 	struct rzg2l_cpg_priv *priv = clk_hw_data->priv;  in rzg3s_div_clk_recalc_rate()
291 	val = readl(priv->base + GET_REG_OFFSET(clk_hw_data->conf));  in rzg3s_div_clk_recalc_rate()
292 	val >>= GET_SHIFT(clk_hw_data->conf);  in rzg3s_div_clk_recalc_rate()
293 	val &= GENMASK(GET_WIDTH(clk_hw_data->conf) - 1, 0);  in rzg3s_div_clk_recalc_rate()
301 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg3s_div_clk_determine_rate()  local
302 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_div_clk_determine_rate()
314 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg3s_div_clk_set_rate()  local
315 	struct div_hw_data *div_hw_data = to_div_hw_data(clk_hw_data);  in rzg3s_div_clk_set_rate()
316 	struct rzg2l_cpg_priv *priv = clk_hw_data->priv;  in rzg3s_div_clk_set_rate()
317 	u32 off = GET_REG_OFFSET(clk_hw_data->conf);  in rzg3s_div_clk_set_rate()
318 	u32 shift = GET_SHIFT(clk_hw_data->conf);  in rzg3s_div_clk_set_rate()
329 	ret = rzg2l_cpg_wait_clk_update_done(priv->base, clk_hw_data->sconf);  in rzg3s_div_clk_set_rate()
460 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg2l_cpg_sd_clk_mux_set_parent()  local
461 	struct sd_mux_hw_data *sd_mux_hw_data = to_sd_mux_hw_data(clk_hw_data);  in rzg2l_cpg_sd_clk_mux_set_parent()
462 	struct rzg2l_cpg_priv *priv = clk_hw_data->priv;  in rzg2l_cpg_sd_clk_mux_set_parent()
463 	u32 off = GET_REG_OFFSET(clk_hw_data->conf);  in rzg2l_cpg_sd_clk_mux_set_parent()
464 	u32 shift = GET_SHIFT(clk_hw_data->conf);  in rzg2l_cpg_sd_clk_mux_set_parent()
476 	ret = rzg2l_cpg_wait_clk_update_done(priv->base, clk_hw_data->sconf);  in rzg2l_cpg_sd_clk_mux_set_parent()
488 	struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);  in rzg2l_cpg_sd_clk_mux_get_parent()  local
489 	struct sd_mux_hw_data *sd_mux_hw_data = to_sd_mux_hw_data(clk_hw_data);  in rzg2l_cpg_sd_clk_mux_get_parent()
490 	struct rzg2l_cpg_priv *priv = clk_hw_data->priv;  in rzg2l_cpg_sd_clk_mux_get_parent()
493 	val = readl(priv->base + GET_REG_OFFSET(clk_hw_data->conf));  in rzg2l_cpg_sd_clk_mux_get_parent()
494 	val >>= GET_SHIFT(clk_hw_data->conf);  in rzg2l_cpg_sd_clk_mux_get_parent()
495 	val &= GENMASK(GET_WIDTH(clk_hw_data->conf) - 1, 0);  in rzg2l_cpg_sd_clk_mux_get_parent()
653 	struct dsi_div_hw_data *clk_hw_data;  in rzg2l_cpg_dsi_div_clk_register()  local
664 	clk_hw_data = devm_kzalloc(priv->dev, sizeof(*clk_hw_data), GFP_KERNEL);  in rzg2l_cpg_dsi_div_clk_register()
665 	if (!clk_hw_data)  in rzg2l_cpg_dsi_div_clk_register()
668 	clk_hw_data->priv = priv;  in rzg2l_cpg_dsi_div_clk_register()
677 	clk_hw = &clk_hw_data->hw;  in rzg2l_cpg_dsi_div_clk_register()
749 	struct pll5_mux_hw_data *clk_hw_data;  in rzg2l_cpg_pll5_4_mux_clk_register()  local
754 	clk_hw_data = devm_kzalloc(priv->dev, sizeof(*clk_hw_data), GFP_KERNEL);  in rzg2l_cpg_pll5_4_mux_clk_register()
755 	if (!clk_hw_data)  in rzg2l_cpg_pll5_4_mux_clk_register()
758 	clk_hw_data->priv = priv;  in rzg2l_cpg_pll5_4_mux_clk_register()
759 	clk_hw_data->conf = core->conf;  in rzg2l_cpg_pll5_4_mux_clk_register()
767 	clk_hw = &clk_hw_data->hw;  in rzg2l_cpg_pll5_4_mux_clk_register()