Lines Matching +full:0 +full:x48
27 .l_reg = 0x4,
28 .m_reg = 0x8,
29 .n_reg = 0xc,
30 .config_reg = 0x14,
31 .mode_reg = 0x0,
32 .status_reg = 0x18,
45 .l = 0xf,
46 .m = 0x91,
47 .n = 0xc7,
48 .vco_val = 0x0,
50 .pre_div_val = 0x0,
52 .post_div_val = 0x0,
64 { P_PXO, 0 },
111 .ns_reg = 0x48,
112 .md_reg = 0x4c,
126 .src_sel_shift = 0,
131 .enable_reg = 0x48,
144 .halt_reg = 0x50,
148 .enable_reg = 0x48,
163 .reg = 0x48,
179 .halt_reg = 0x50,
180 .halt_bit = 0,
183 .enable_reg = 0x48,
203 .reg = 0x48,
228 .ns_reg = 0x54,
229 .md_reg = 0x58,
243 .src_sel_shift = 0,
248 .enable_reg = 0x54,
261 .halt_reg = 0x5c,
262 .halt_bit = 0,
265 .enable_reg = 0x54,
285 .reg = 0x54,
312 .ns_reg = 0xcc,
313 .md_reg = 0xd0,
327 .src_sel_shift = 0,
332 .enable_reg = 0xcc,
345 .halt_reg = 0xd4,
349 .enable_reg = 0xcc,
369 .ns_reg = 0x38,
370 .md_reg = 0x3c,
384 .src_sel_shift = 0,
389 .enable_reg = 0x38,
416 [LCC_PCM_RESET] = { 0x54, 13 },
423 .max_register = 0xfc,
451 regmap_read(regmap, 0x0, &val); in lcc_ipq806x_probe()
455 regmap_write(regmap, 0xc4, 0x1); in lcc_ipq806x_probe()