Lines Matching refs:sc
60 static int gdsc_check_status(struct gdsc *sc, enum gdsc_status status) in gdsc_check_status() argument
66 if (sc->flags & POLL_CFG_GDSCR) in gdsc_check_status()
67 reg = sc->gdscr + CFG_GDSCR_OFFSET; in gdsc_check_status()
68 else if (sc->gds_hw_ctrl) in gdsc_check_status()
69 reg = sc->gds_hw_ctrl; in gdsc_check_status()
71 reg = sc->gdscr; in gdsc_check_status()
73 ret = regmap_read(sc->regmap, reg, &val); in gdsc_check_status()
77 if (sc->flags & POLL_CFG_GDSCR) { in gdsc_check_status()
96 static int gdsc_hwctrl(struct gdsc *sc, bool en) in gdsc_hwctrl() argument
100 return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val); in gdsc_hwctrl()
103 static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status) in gdsc_poll_status() argument
109 if (gdsc_check_status(sc, status)) in gdsc_poll_status()
113 if (gdsc_check_status(sc, status)) in gdsc_poll_status()
119 static int gdsc_update_collapse_bit(struct gdsc *sc, bool val) in gdsc_update_collapse_bit() argument
124 if (sc->collapse_mask) { in gdsc_update_collapse_bit()
125 reg = sc->collapse_ctrl; in gdsc_update_collapse_bit()
126 mask = sc->collapse_mask; in gdsc_update_collapse_bit()
128 reg = sc->gdscr; in gdsc_update_collapse_bit()
132 ret = regmap_update_bits(sc->regmap, reg, mask, val ? mask : 0); in gdsc_update_collapse_bit()
139 static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status, in gdsc_toggle_logic() argument
144 if (status == GDSC_ON && sc->rsupply) { in gdsc_toggle_logic()
145 ret = regulator_enable(sc->rsupply); in gdsc_toggle_logic()
150 ret = gdsc_update_collapse_bit(sc, status == GDSC_OFF); in gdsc_toggle_logic()
153 if ((sc->flags & VOTABLE) && status == GDSC_OFF && !wait) { in gdsc_toggle_logic()
163 if (sc->gds_hw_ctrl) { in gdsc_toggle_logic()
177 ret = gdsc_poll_status(sc, status); in gdsc_toggle_logic()
178 WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n"); in gdsc_toggle_logic()
180 if (!ret && status == GDSC_OFF && sc->rsupply) { in gdsc_toggle_logic()
181 ret = regulator_disable(sc->rsupply); in gdsc_toggle_logic()
189 static inline int gdsc_deassert_reset(struct gdsc *sc) in gdsc_deassert_reset() argument
193 for (i = 0; i < sc->reset_count; i++) in gdsc_deassert_reset()
194 sc->rcdev->ops->deassert(sc->rcdev, sc->resets[i]); in gdsc_deassert_reset()
198 static inline int gdsc_assert_reset(struct gdsc *sc) in gdsc_assert_reset() argument
202 for (i = 0; i < sc->reset_count; i++) in gdsc_assert_reset()
203 sc->rcdev->ops->assert(sc->rcdev, sc->resets[i]); in gdsc_assert_reset()
207 static inline void gdsc_force_mem_on(struct gdsc *sc) in gdsc_force_mem_on() argument
212 if (!(sc->flags & NO_RET_PERIPH)) in gdsc_force_mem_on()
215 for (i = 0; i < sc->cxc_count; i++) in gdsc_force_mem_on()
216 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, mask); in gdsc_force_mem_on()
219 static inline void gdsc_clear_mem_on(struct gdsc *sc) in gdsc_clear_mem_on() argument
224 if (!(sc->flags & NO_RET_PERIPH)) in gdsc_clear_mem_on()
227 for (i = 0; i < sc->cxc_count; i++) in gdsc_clear_mem_on()
228 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, 0); in gdsc_clear_mem_on()
231 static inline void gdsc_deassert_clamp_io(struct gdsc *sc) in gdsc_deassert_clamp_io() argument
233 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_deassert_clamp_io()
237 static inline void gdsc_assert_clamp_io(struct gdsc *sc) in gdsc_assert_clamp_io() argument
239 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_assert_clamp_io()
243 static inline void gdsc_assert_reset_aon(struct gdsc *sc) in gdsc_assert_reset_aon() argument
245 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_assert_reset_aon()
248 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_assert_reset_aon()
252 static void gdsc_retain_ff_on(struct gdsc *sc) in gdsc_retain_ff_on() argument
256 regmap_update_bits(sc->regmap, sc->gdscr, mask, mask); in gdsc_retain_ff_on()
261 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_enable() local
264 if (sc->pwrsts == PWRSTS_ON) in gdsc_enable()
265 return gdsc_deassert_reset(sc); in gdsc_enable()
267 if (sc->flags & SW_RESET) { in gdsc_enable()
268 gdsc_assert_reset(sc); in gdsc_enable()
270 gdsc_deassert_reset(sc); in gdsc_enable()
273 if (sc->flags & CLAMP_IO) { in gdsc_enable()
274 if (sc->flags & AON_RESET) in gdsc_enable()
275 gdsc_assert_reset_aon(sc); in gdsc_enable()
276 gdsc_deassert_clamp_io(sc); in gdsc_enable()
279 ret = gdsc_toggle_logic(sc, GDSC_ON, false); in gdsc_enable()
283 if (sc->pwrsts & PWRSTS_OFF) in gdsc_enable()
284 gdsc_force_mem_on(sc); in gdsc_enable()
296 if (sc->flags & HW_CTRL) { in gdsc_enable()
297 ret = gdsc_hwctrl(sc, true); in gdsc_enable()
311 if (sc->flags & RETAIN_FF_ENABLE) in gdsc_enable()
312 gdsc_retain_ff_on(sc); in gdsc_enable()
319 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_disable() local
322 if (sc->pwrsts == PWRSTS_ON) in gdsc_disable()
323 return gdsc_assert_reset(sc); in gdsc_disable()
326 if (sc->flags & HW_CTRL) { in gdsc_disable()
327 ret = gdsc_hwctrl(sc, false); in gdsc_disable()
338 ret = gdsc_poll_status(sc, GDSC_ON); in gdsc_disable()
343 if (sc->pwrsts & PWRSTS_OFF) in gdsc_disable()
344 gdsc_clear_mem_on(sc); in gdsc_disable()
353 if (sc->pwrsts == PWRSTS_RET_ON) in gdsc_disable()
356 ret = gdsc_toggle_logic(sc, GDSC_OFF, domain->synced_poweroff); in gdsc_disable()
360 if (sc->flags & CLAMP_IO) in gdsc_disable()
361 gdsc_assert_clamp_io(sc); in gdsc_disable()
368 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_set_hwmode() local
371 ret = gdsc_hwctrl(sc, mode); in gdsc_set_hwmode()
388 return gdsc_poll_status(sc, GDSC_ON); in gdsc_set_hwmode()
395 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_get_hwmode() local
398 regmap_read(sc->regmap, sc->gdscr, &val); in gdsc_get_hwmode()
403 static int gdsc_init(struct gdsc *sc) in gdsc_init() argument
416 if (!sc->en_rest_wait_val) in gdsc_init()
417 sc->en_rest_wait_val = EN_REST_WAIT_VAL; in gdsc_init()
418 if (!sc->en_few_wait_val) in gdsc_init()
419 sc->en_few_wait_val = EN_FEW_WAIT_VAL; in gdsc_init()
420 if (!sc->clk_dis_wait_val) in gdsc_init()
421 sc->clk_dis_wait_val = CLK_DIS_WAIT_VAL; in gdsc_init()
423 val = sc->en_rest_wait_val << EN_REST_WAIT_SHIFT | in gdsc_init()
424 sc->en_few_wait_val << EN_FEW_WAIT_SHIFT | in gdsc_init()
425 sc->clk_dis_wait_val << CLK_DIS_WAIT_SHIFT; in gdsc_init()
427 ret = regmap_update_bits(sc->regmap, sc->gdscr, mask, val); in gdsc_init()
432 if (sc->pwrsts == PWRSTS_ON) { in gdsc_init()
433 ret = gdsc_toggle_logic(sc, GDSC_ON, false); in gdsc_init()
438 on = gdsc_check_status(sc, GDSC_ON); in gdsc_init()
444 if (sc->rsupply) { in gdsc_init()
445 ret = regulator_enable(sc->rsupply); in gdsc_init()
454 if (sc->flags & VOTABLE) { in gdsc_init()
455 ret = gdsc_update_collapse_bit(sc, false); in gdsc_init()
461 if (sc->flags & HW_CTRL) { in gdsc_init()
462 ret = gdsc_hwctrl(sc, true); in gdsc_init()
472 if (sc->flags & RETAIN_FF_ENABLE) in gdsc_init()
473 gdsc_retain_ff_on(sc); in gdsc_init()
474 } else if (sc->flags & ALWAYS_ON) { in gdsc_init()
476 gdsc_enable(&sc->pd); in gdsc_init()
480 if (on || (sc->pwrsts & PWRSTS_RET)) in gdsc_init()
481 gdsc_force_mem_on(sc); in gdsc_init()
483 gdsc_clear_mem_on(sc); in gdsc_init()
485 if (sc->flags & ALWAYS_ON) in gdsc_init()
486 sc->pd.flags |= GENPD_FLAG_ALWAYS_ON; in gdsc_init()
487 if (!sc->pd.power_off) in gdsc_init()
488 sc->pd.power_off = gdsc_disable; in gdsc_init()
489 if (!sc->pd.power_on) in gdsc_init()
490 sc->pd.power_on = gdsc_enable; in gdsc_init()
491 if (sc->flags & HW_CTRL_TRIGGER) { in gdsc_init()
492 sc->pd.set_hwmode_dev = gdsc_set_hwmode; in gdsc_init()
493 sc->pd.get_hwmode_dev = gdsc_get_hwmode; in gdsc_init()
496 ret = pm_genpd_init(&sc->pd, NULL, !on); in gdsc_init()
503 if (on && sc->rsupply) in gdsc_init()
504 regulator_disable(sc->rsupply); in gdsc_init()
606 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_gx_do_nothing_enable() local
610 if (sc->rsupply) in gdsc_gx_do_nothing_enable()
611 ret = regulator_enable(sc->rsupply); in gdsc_gx_do_nothing_enable()