340 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
345 		ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
384 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,  in clk_alpha_pll_write_config()  argument
388 		regmap_write(regmap, reg, val);  in clk_alpha_pll_write_config()
391 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_alpha_pll_configure()  argument
396 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_alpha_pll_configure()
397 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_alpha_pll_configure()
398 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_alpha_pll_configure()
401 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_alpha_pll_configure()
405 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_alpha_pll_configure()
425 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
428 		regmap_update_bits(regmap, PLL_TEST_CTL(pll),  in clk_alpha_pll_configure()
432 		clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_alpha_pll_configure()
436 		regmap_update_bits(regmap, PLL_TEST_CTL_U(pll),  in clk_alpha_pll_configure()
440 		clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_alpha_pll_configure()
444 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_alpha_pll_configure()
454 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_enable()
463 	ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);  in clk_alpha_pll_hwfsm_enable()
479 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_disable()
484 		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
495 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
509 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in pll_is_enabled()
533 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_enable()
549 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
561 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
570 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
584 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_disable()
595 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
602 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
660 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_alpha_pll_recalc_rate()
662 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
664 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);  in clk_alpha_pll_recalc_rate()
666 			regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_recalc_rate()
686 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);  in __clk_alpha_pll_update_latch()
689 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in __clk_alpha_pll_update_latch()
707 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);  in __clk_alpha_pll_update_latch()
751 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __clk_alpha_pll_set_rate()
757 		regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);  in __clk_alpha_pll_set_rate()
759 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __clk_alpha_pll_set_rate()
762 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
767 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
805 void clk_huayra_2290_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_huayra_2290_pll_configure()  argument
810 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_huayra_2290_pll_configure()
811 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_huayra_2290_pll_configure()
812 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_huayra_2290_pll_configure()
813 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_huayra_2290_pll_configure()
814 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_huayra_2290_pll_configure()
815 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_huayra_2290_pll_configure()
816 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_huayra_2290_pll_configure()
817 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_huayra_2290_pll_configure()
818 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_huayra_2290_pll_configure()
821 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_huayra_2290_pll_configure()
822 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_huayra_2290_pll_configure()
828 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_huayra_2290_pll_configure()
829 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_huayra_2290_pll_configure()
835 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_huayra_2290_pll_configure()
893 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_huayra_recalc_rate()
894 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
897 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);  in alpha_pll_huayra_recalc_rate()
948 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
951 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);  in alpha_pll_huayra_set_rate()
964 		regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
970 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
971 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_huayra_set_rate()
974 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
977 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
992 				struct regmap *regmap)  in trion_pll_is_enabled()  argument
997 	ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);  in trion_pll_is_enabled()
998 	ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in trion_pll_is_enabled()
1009 	return trion_pll_is_enabled(pll, pll->clkr.regmap);  in clk_trion_pll_is_enabled()
1015 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_enable()  local
1019 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_enable()
1032 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_trion_pll_enable()
1039 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
1045 	return regmap_update_bits(regmap, PLL_MODE(pll),  in clk_trion_pll_enable()
1052 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_disable()  local
1056 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_disable()
1067 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_trion_pll_disable()
1072 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
1078 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_disable()
1079 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_disable()
1088 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_trion_pll_recalc_rate()
1089 	regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);  in clk_trion_pll_recalc_rate()
1147 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
1194 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
1215 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1233 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_fabia_pll_configure()  argument
1238 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_fabia_pll_configure()
1239 	clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);  in clk_fabia_pll_configure()
1240 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_fabia_pll_configure()
1242 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_fabia_pll_configure()
1244 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_fabia_pll_configure()
1246 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_fabia_pll_configure()
1248 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_fabia_pll_configure()
1250 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_fabia_pll_configure()
1256 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1260 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,  in clk_fabia_pll_configure()
1263 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_fabia_pll_configure()
1266 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_fabia_pll_configure()
1275 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_enable()  local
1277 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_enable()
1289 	ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in alpha_pll_fabia_enable()
1297 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_enable()
1301 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_enable()
1305 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,  in alpha_pll_fabia_enable()
1310 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_fabia_enable()
1318 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1323 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,  in alpha_pll_fabia_enable()
1332 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_disable()  local
1334 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_disable()
1344 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_disable()
1349 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1354 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_disable()
1363 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_fabia_recalc_rate()
1364 	regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);  in alpha_pll_fabia_recalc_rate()
1402 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_fabia_set_rate()
1403 	regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);  in alpha_pll_fabia_set_rate()
1420 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_prepare()
1449 	regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);  in alpha_pll_fabia_prepare()
1490 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1511 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_recalc_rate()  local
1514 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1544 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_set_rate()  local
1555 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1586 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_postdiv_fabia_set_rate()
1601 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1620 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_trion_pll_configure()  argument
1627 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_trion_pll_configure()
1632 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_trion_pll_configure()
1633 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_trion_pll_configure()
1634 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_trion_pll_configure()
1635 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_trion_pll_configure()
1637 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_trion_pll_configure()
1639 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_trion_pll_configure()
1641 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1643 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_trion_pll_configure()
1645 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_trion_pll_configure()
1647 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_trion_pll_configure()
1649 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_trion_pll_configure()
1651 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_trion_pll_configure()
1654 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_trion_pll_configure()
1658 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_trion_pll_configure()
1661 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_configure()
1664 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_configure()
1679 	regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);  in __alpha_pll_trion_prepare()
1716 	regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK,  l);  in __alpha_pll_trion_set_rate()
1717 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __alpha_pll_trion_set_rate()
1720 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);  in __alpha_pll_trion_set_rate()
1726 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in __alpha_pll_trion_set_rate()
1733 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);  in __alpha_pll_trion_set_rate()
1783 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_agera_pll_configure()  argument
1786 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_agera_pll_configure()
1787 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_agera_pll_configure()
1788 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_agera_pll_configure()
1790 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_agera_pll_configure()
1792 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_agera_pll_configure()
1794 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_agera_pll_configure()
1796 	clk_alpha_pll_write_config(regmap,  PLL_TEST_CTL_U(pll),  in clk_agera_pll_configure()
1816 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_agera_set_rate()
1817 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_agera_set_rate()
1842 void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_5lpe_pll_configure()  argument
1849 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_lucid_5lpe_pll_configure()
1854 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_lucid_5lpe_pll_configure()
1855 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_lucid_5lpe_pll_configure()
1856 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_5lpe_pll_configure()
1857 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1859 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_lucid_5lpe_pll_configure()
1861 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_lucid_5lpe_pll_configure()
1863 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1865 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_lucid_5lpe_pll_configure()
1867 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_lucid_5lpe_pll_configure()
1869 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1871 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_lucid_5lpe_pll_configure()
1873 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_lucid_5lpe_pll_configure()
1877 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_lucid_5lpe_pll_configure()
1880 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_5lpe_pll_configure()
1883 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_5lpe_pll_configure()
1893 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_enable()
1906 	ret = trion_pll_is_enabled(pll, pll->clkr.regmap);  in alpha_pll_lucid_5lpe_enable()
1910 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_5lpe_enable()
1914 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_5lpe_enable()
1921 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_5lpe_enable()
1926 	return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_5lpe_enable()
1935 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_disable()
1946 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_lucid_5lpe_disable()
1951 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_lucid_5lpe_disable()
1956 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_lucid_5lpe_disable()
1971 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_lucid_5lpe_prepare()
2001 	struct regmap *regmap = pll->clkr.regmap;  in __clk_lucid_pll_postdiv_set_rate()  local
2009 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in __clk_lucid_pll_postdiv_set_rate()
2031 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_lucid_pll_postdiv_set_rate()
2068 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_zonda_pll_configure()  argument
2071 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_zonda_pll_configure()
2072 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_zonda_pll_configure()
2073 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_zonda_pll_configure()
2074 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_zonda_pll_configure()
2075 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_zonda_pll_configure()
2076 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_zonda_pll_configure()
2077 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_zonda_pll_configure()
2078 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_zonda_pll_configure()
2079 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_zonda_pll_configure()
2080 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_zonda_pll_configure()
2081 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_zonda_pll_configure()
2083 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);  in clk_zonda_pll_configure()
2086 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_configure()
2089 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_zonda_pll_configure()
2092 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_configure()
2099 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_enable()  local
2103 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_enable()
2114 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_zonda_pll_enable()
2122 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_enable()
2125 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_zonda_pll_enable()
2127 	regmap_read(regmap, PLL_TEST_CTL(pll), &val);  in clk_zonda_pll_enable()
2138 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);  in clk_zonda_pll_enable()
2141 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_zonda_pll_enable()
2149 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_disable()  local
2152 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_disable()
2161 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_disable()
2164 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);  in clk_zonda_pll_disable()
2167 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);  in clk_zonda_pll_disable()
2170 	regmap_write(regmap, PLL_OPMODE(pll), 0x0);  in clk_zonda_pll_disable()
2202 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_zonda_pll_set_rate()
2203 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_zonda_pll_set_rate()
2212 	regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);  in clk_zonda_pll_set_rate()
2237 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_evo_pll_configure()  argument
2246 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_lucid_evo_pll_configure()
2252 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);  in clk_lucid_evo_pll_configure()
2253 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_evo_pll_configure()
2254 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_lucid_evo_pll_configure()
2255 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2256 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2257 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_evo_pll_configure()
2258 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2259 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_lucid_evo_pll_configure()
2260 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2261 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2262 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);  in clk_lucid_evo_pll_configure()
2265 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_lucid_evo_pll_configure()
2268 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_evo_pll_configure()
2269 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_evo_pll_configure()
2273 void clk_lucid_ole_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_ole_pll_configure()  argument
2280 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);  in clk_lucid_ole_pll_configure()
2281 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_ole_pll_configure()
2282 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_lucid_ole_pll_configure()
2283 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_lucid_ole_pll_configure()
2284 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_lucid_ole_pll_configure()
2285 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_ole_pll_configure()
2286 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_lucid_ole_pll_configure()
2287 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_lucid_ole_pll_configure()
2288 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_lucid_ole_pll_configure()
2289 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_lucid_ole_pll_configure()
2290 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);  in clk_lucid_ole_pll_configure()
2293 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_lucid_ole_pll_configure()
2296 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_ole_pll_configure()
2297 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_ole_pll_configure()
2304 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_enable()  local
2308 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_evo_enable()
2321 	ret = trion_pll_is_enabled(pll, regmap);  in alpha_pll_lucid_evo_enable()
2329 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_evo_enable()
2334 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_evo_enable()
2341 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_evo_enable()
2346 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_evo_enable()
2358 	struct regmap *regmap = pll->clkr.regmap;  in _alpha_pll_lucid_evo_disable()  local
2362 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in _alpha_pll_lucid_evo_disable()
2373 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in _alpha_pll_lucid_evo_disable()
2378 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in _alpha_pll_lucid_evo_disable()
2383 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in _alpha_pll_lucid_evo_disable()
2386 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, 0);  in _alpha_pll_lucid_evo_disable()
2397 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in _alpha_pll_lucid_evo_prepare()
2438 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_recalc_rate()  local
2441 	regmap_read(regmap, PLL_L_VAL(pll), &l);  in alpha_pll_lucid_evo_recalc_rate()
2443 	regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);  in alpha_pll_lucid_evo_recalc_rate()
2492 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_rivian_evo_pll_configure()  argument
2495 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_rivian_evo_pll_configure()
2496 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2497 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_rivian_evo_pll_configure()
2498 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_rivian_evo_pll_configure()
2499 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2500 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_rivian_evo_pll_configure()
2501 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_rivian_evo_pll_configure()
2502 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2504 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_rivian_evo_pll_configure()
2506 	regmap_update_bits(regmap, PLL_MODE(pll),  in clk_rivian_evo_pll_configure()
2518 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_rivian_evo_pll_recalc_rate()
2550 void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_stromer_pll_configure()  argument
2555 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_stromer_pll_configure()
2556 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_stromer_pll_configure()
2557 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_stromer_pll_configure()
2560 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_stromer_pll_configure()
2564 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_stromer_pll_configure()
2586 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_stromer_pll_configure()
2595 	regmap_update_bits(regmap, PLL_USER_CTL_U(pll), mask_u, val_u);  in clk_stromer_pll_configure()
2596 	regmap_write(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_stromer_pll_configure()
2597 	regmap_write(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_stromer_pll_configure()
2600 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_stromer_pll_configure()
2626 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_stromer_set_rate()
2629 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_stromer_set_rate()
2630 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_stromer_set_rate()
2633 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_set_rate()
2644 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in clk_alpha_pll_stromer_set_rate()
2675 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &pll_mode);  in clk_alpha_pll_stromer_plus_set_rate()
2679 	regmap_write(pll->clkr.regmap, PLL_MODE(pll), 0);  in clk_alpha_pll_stromer_plus_set_rate()
2684 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_stromer_plus_set_rate()
2689 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_stromer_plus_set_rate()
2690 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_stromer_plus_set_rate()
2693 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_plus_set_rate()
2696 	regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL);  in clk_alpha_pll_stromer_plus_set_rate()
2700 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N,  in clk_alpha_pll_stromer_plus_set_rate()
2714 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,  in clk_alpha_pll_stromer_plus_set_rate()
2730 void clk_regera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_regera_pll_configure()  argument
2733 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_regera_pll_configure()
2734 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_regera_pll_configure()
2735 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_regera_pll_configure()
2736 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_regera_pll_configure()
2737 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_regera_pll_configure()
2738 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_regera_pll_configure()
2739 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_regera_pll_configure()
2740 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_regera_pll_configure()
2741 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_regera_pll_configure()
2742 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_regera_pll_configure()
2743 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_regera_pll_configure()
2746 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_regera_pll_configure()