41 #define PLL_USER_CTL(p)		((p)->offset + (p)->regs[PLL_OFF_USER_CTL])  macro
425 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
662 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
762 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
767 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
818 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_huayra_2290_pll_configure()
894 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
948 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
974 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
977 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
1039 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
1072 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
1147 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
1194 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
1215 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1244 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_fabia_pll_configure()
1256 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1318 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1349 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1490 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1514 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1555 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1601 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1641 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1788 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_agera_pll_configure()
1863 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1893 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_enable()
1921 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_5lpe_enable()
1935 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_disable()
1951 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_lucid_5lpe_disable()
2009 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in __clk_lucid_pll_postdiv_set_rate()
2031 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_lucid_pll_postdiv_set_rate()
2076 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_zonda_pll_configure()
2138 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);  in clk_zonda_pll_enable()
2164 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);  in clk_zonda_pll_disable()
2257 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_evo_pll_configure()
2285 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_ole_pll_configure()
2308 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_evo_enable()
2341 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_evo_enable()
2362 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in _alpha_pll_lucid_evo_disable()
2378 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in _alpha_pll_lucid_evo_disable()
2501 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_rivian_evo_pll_configure()
2586 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_stromer_pll_configure()
2633 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_set_rate()
2693 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_plus_set_rate()
2738 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_regera_pll_configure()