clk/pxa/clk-pxa25x.c

1 // SPDX-License-Identifier: GPL-2.0-only
7  * Heavily inspired from former arch/arm/mach-pxa/pxa25x.c.
9  * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
12 #include <linux/clk-provider.h>
13 #include <linux/clk.h>
14 #include <linux/clk/pxa.h>
21 #include <dt-bindings/clock/pxa-clock.h>
22 #include "clk-pxa.h"
23 #include "clk-pxa2xx.h"
46 /* Crystal Frequency to Memory Frequency Multiplier (L) */
49 /* Memory Frequency to Run Mode Frequency Multiplier (M) */
52 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
68  * Get the clock frequency as reflected by CCCR and the turbo flag.
74 	struct clk *clk;  in pxa25x_get_clk_frequency_khz()  local
79 		clk = clk_get(NULL, get_freq_khz[i]);  in pxa25x_get_clk_frequency_khz()
80 		if (IS_ERR(clk)) {  in pxa25x_get_clk_frequency_khz()
83 			clks[i] = clk_get_rate(clk);  in pxa25x_get_clk_frequency_khz()
84 			clk_put(clk);  in pxa25x_get_clk_frequency_khz()
137 	PXA25X_PBUS95_CKEN("pxa2xx-mci.0", NULL, MMC, 1, 5, 0),
138 	PXA25X_PBUS95_CKEN("pxa2xx-i2c.0", NULL, I2C, 1, 3, 0),
139 	PXA25X_PBUS95_CKEN("pxa2xx-ir", "FICPCLK", FICP, 1, 2, 0),
140 	PXA25X_PBUS95_CKEN("pxa25x-udc", NULL, USB, 1, 2, 5),
141 	PXA25X_PBUS147_CKEN("pxa2xx-uart.0", NULL, FFUART, 1, 10, 1),
142 	PXA25X_PBUS147_CKEN("pxa2xx-uart.1", NULL, BTUART, 1, 10, 1),
143 	PXA25X_PBUS147_CKEN("pxa2xx-uart.2", NULL, STUART, 1, 10, 1),
144 	PXA25X_PBUS147_CKEN("pxa2xx-uart.3", NULL, HWUART, 1, 10, 1),
145 	PXA25X_PBUS147_CKEN("pxa2xx-i2s", NULL, I2S, 1, 10, 0),
147 	PXA25X_OSC3_CKEN("pxa25x-ssp.0", NULL, SSP, 1, 1, 0),
148 	PXA25X_OSC3_CKEN("pxa25x-nssp.1", NULL, NSSP, 1, 1, 0),
149 	PXA25X_OSC3_CKEN("pxa25x-nssp.2", NULL, ASSP, 1, 1, 0),
150 	PXA25X_OSC3_CKEN("pxa25x-pwm.0", NULL, PWM0, 1, 1, 0),
151 	PXA25X_OSC3_CKEN("pxa25x-pwm.1", NULL, PWM1, 1, 1, 0),
153 	PXA25X_CKEN_1RATE("pxa2xx-fb", NULL, LCD, clk_pxa25x_memory_parents, 0),
154 	PXA25X_CKEN_1RATE_AO("pxa2xx-pcmcia", NULL, MEMC,
160  *   - freq_cpll = n * m * L * 3.6864 MHz
161  *   - n = N2 / 2
162  *   - m = 2^(M - 1), where 1 <= M <= 3
163  *   - l = L_clk_mult[L], ie. { 0, 27, 32, 36, 40, 45, 0, }[L]
188 		return -EINVAL;  in clk_pxa25x_core_set_parent()
248 		return -EINVAL;  in clk_pxa25x_cpll_set_rate()
298 	DUMMY_CLK(NULL, "pxa25x-gpio", "osc_32_768khz"),
299 	DUMMY_CLK(NULL, "pxa26x-gpio", "osc_32_768khz"),
302 	DUMMY_CLK(NULL, "sa1100-rtc", "osc_32_768khz"),
304 	DUMMY_CLK("UARTCLK", "pxa2xx-ir", "STUART"),
309 	struct clk *clk;  in pxa25x_dummy_clocks_init()  local
315 	 * All pinctrl logic has been wiped out of the clock driver, especially  in pxa25x_dummy_clocks_init()
321 		name = d->dev_id ? d->dev_id : d->con_id;  in pxa25x_dummy_clocks_init()
322 		clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1);  in pxa25x_dummy_clocks_init()
323 		clk_register_clkdev(clk, d->con_id, d->dev_id);  in pxa25x_dummy_clocks_init()
340 CLK_OF_DECLARE(pxa25x_clks, "marvell,pxa250-core-clocks",