Lines Matching refs:lpc32xx_clk
302 struct lpc32xx_clk { struct
366 #define to_lpc32xx_clk(_hw) container_of(_hw, struct lpc32xx_clk, hw)
390 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in clk_mask_enable()
404 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in clk_mask_disable()
412 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in clk_mask_is_enabled()
715 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in clk_ddram_is_enabled()
727 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in clk_ddram_enable()
748 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in clk_ddram_recalc_rate()
770 struct lpc32xx_clk *clk = to_lpc32xx_clk(hw); in lpc32xx_clk_uart_recalc_rate()
1059 struct lpc32xx_clk clk;
1384 const struct clk_proto_t *lpc32xx_clk = &clk_proto[id]; in lpc32xx_clk_register() local
1390 for (i = 0; i < lpc32xx_clk->num_parents; i++) in lpc32xx_clk_register()
1391 parents[i] = clk_proto[lpc32xx_clk->parents[i]].name; in lpc32xx_clk_register()
1393 pr_debug("%s: derived from '%s', clock type %d\n", lpc32xx_clk->name, in lpc32xx_clk_register()
1405 .name = lpc32xx_clk->name, in lpc32xx_clk_register()
1407 .num_parents = lpc32xx_clk->num_parents, in lpc32xx_clk_register()
1408 .flags = lpc32xx_clk->flags, in lpc32xx_clk_register()
1454 clk = clk_register_composite(NULL, lpc32xx_clk->name, in lpc32xx_clk_register()
1455 parents, lpc32xx_clk->num_parents, in lpc32xx_clk_register()
1457 gate_hw, gops, lpc32xx_clk->flags); in lpc32xx_clk_register()
1464 clk = clk_register_fixed_rate(NULL, lpc32xx_clk->name, in lpc32xx_clk_register()
1564 CLK_OF_DECLARE(lpc32xx_clk, "nxp,lpc3220-clk", lpc32xx_clk_init);