127 static const char *const sel_pll0[] __initconst = { "pll0", "ref_xtal", };
130 static const char *const ptp_sels[] __initconst = { "ref_xtal", "pll0", };
133 	ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1,  enumerator
168 	clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000);  in mx28_clocks_init()
171 	clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0);  in mx28_clocks_init()
172 	clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1);  in mx28_clocks_init()
173 	clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 2);  in mx28_clocks_init()
174 	clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 3);  in mx28_clocks_init()
175 	clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0);  in mx28_clocks_init()
176 	clks[ref_hsadc] = mxs_clk_ref("ref_hsadc", "pll0", FRAC1, 1);  in mx28_clocks_init()
177 	clks[ref_gpmi] = mxs_clk_ref("ref_gpmi", "pll0", FRAC1, 2);  in mx28_clocks_init()
209 	clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll0", 1, 4);  in mx28_clocks_init()
229 	clks[usb0_phy] = clk_register_gate(NULL, "usb0_phy", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock);  in mx28_clocks_init()