Lines Matching +full:reg +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/clk-provider.h>
13 * struct clk_frac - mxs fractional divider clock
15 * @reg: register address
16 * @shift: the divider bit shift
18 * @busy: busy bit shift
25 void __iomem *reg; member
26 u8 shift; member
40 div = readl_relaxed(frac->reg) >> frac->shift; in clk_frac_recalc_rate()
41 div &= (1 << frac->width) - 1; in clk_frac_recalc_rate()
44 return tmp_rate >> frac->width; in clk_frac_recalc_rate()
56 return -EINVAL; in clk_frac_round_rate()
59 tmp <<= frac->width; in clk_frac_round_rate()
64 return -EINVAL; in clk_frac_round_rate()
67 result = tmp_rate >> frac->width; in clk_frac_round_rate()
68 if ((result << frac->width) < tmp_rate) in clk_frac_round_rate()
82 return -EINVAL; in clk_frac_set_rate()
85 tmp <<= frac->width; in clk_frac_set_rate()
90 return -EINVAL; in clk_frac_set_rate()
94 val = readl_relaxed(frac->reg); in clk_frac_set_rate()
95 val &= ~(((1 << frac->width) - 1) << frac->shift); in clk_frac_set_rate()
96 val |= div << frac->shift; in clk_frac_set_rate()
97 writel_relaxed(val, frac->reg); in clk_frac_set_rate()
101 return mxs_clk_wait(frac->reg, frac->busy); in clk_frac_set_rate()
111 void __iomem *reg, u8 shift, u8 width, u8 busy) in mxs_clk_frac() argument
119 return ERR_PTR(-ENOMEM); in mxs_clk_frac()
127 frac->reg = reg; in mxs_clk_frac()
128 frac->shift = shift; in mxs_clk_frac()
129 frac->width = width; in mxs_clk_frac()
130 frac->busy = busy; in mxs_clk_frac()
131 frac->hw.init = &init; in mxs_clk_frac()
133 clk = clk_register(NULL, &frac->hw); in mxs_clk_frac()