Lines Matching refs:mux_div
136 u32 mux_div, fc_req; in _set_rate() local
148 mux_div = readl(ri->reg_clk_ctrl); in _set_rate()
150 mux_div = readl(ri->reg_clk_sel); in _set_rate()
155 mux_div &= ~MMP_CLK_BITS_MASK(width, shift); in _set_rate()
156 mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift); in _set_rate()
162 mux_div &= ~MMP_CLK_BITS_MASK(width, shift); in _set_rate()
163 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
167 writel(mux_div, ri->reg_clk_ctrl); in _set_rate()
169 mux_div |= (1 << ri->bit_fc); in _set_rate()
170 writel(mux_div, ri->reg_clk_ctrl); in _set_rate()
189 writel(mux_div, ri->reg_clk_sel); in _set_rate()
291 u32 mux_div = 0; in mmp_clk_mix_get_parent() local
300 mux_div = readl(ri->reg_clk_ctrl); in mmp_clk_mix_get_parent()
302 mux_div = readl(ri->reg_clk_sel); in mmp_clk_mix_get_parent()
310 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
321 u32 mux_div = 0; in mmp_clk_mix_recalc_rate() local
330 mux_div = readl(ri->reg_clk_ctrl); in mmp_clk_mix_recalc_rate()
332 mux_div = readl(ri->reg_clk_sel); in mmp_clk_mix_recalc_rate()
340 div = _get_div(mix, MMP_CLK_BITS_GET_VAL(mux_div, width, shift)); in mmp_clk_mix_recalc_rate()