75 /* SoC specific clock needed during SPLL clock rate switch */
628 		pr_warn("spll: no match found\n");  in spll_calc_mult_div()
689 	 * We can't change SPLL counters when it is in-active use  in spll_clk_set_rate()
725 /* SPLL clock operation */
735 	struct pic32_sys_pll *spll;  in pic32_spll_clk_register()  local
738 	spll = devm_kzalloc(core->dev, sizeof(*spll), GFP_KERNEL);  in pic32_spll_clk_register()
739 	if (!spll)  in pic32_spll_clk_register()
742 	spll->core = core;  in pic32_spll_clk_register()
743 	spll->hw.init = &data->init_data;  in pic32_spll_clk_register()
744 	spll->ctrl_reg = data->ctrl_reg + core->iobase;  in pic32_spll_clk_register()
745 	spll->status_reg = data->status_reg + core->iobase;  in pic32_spll_clk_register()
746 	spll->lock_mask = data->lock_mask;  in pic32_spll_clk_register()
749 	spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK;  in pic32_spll_clk_register()
750 	spll->idiv += 1;  in pic32_spll_clk_register()
752 	clk = devm_clk_register(core->dev, &spll->hw);  in pic32_spll_clk_register()