Lines Matching +full:data +full:- +full:shift

1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
5 * Copyright (c) 2022-2023 Amlogic, inc. All rights reserved
9 #include <linux/clk-provider.h>
13 #include "clk-regmap.h"
14 #include "vid-pll-div.h"
15 #include "clk-dualdiv.h"
16 #include "s4-peripherals.h"
17 #include "meson-clkc-utils.h"
18 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
21 .data = &(struct clk_regmap_gate_data){
47 .data = &(struct meson_clk_dualdiv_data){
50 .shift = 0,
55 .shift = 12,
60 .shift = 0,
65 .shift = 12,
70 .shift = 28,
86 .data = &(struct clk_regmap_mux_data) {
89 .shift = 24,
105 .data = &(struct clk_regmap_gate_data){
121 .data = &(struct clk_regmap_mux_data) {
124 .shift = 0,
159 .data = &(struct clk_regmap_mux_data){
162 .shift = 26,
174 .data = &(struct clk_regmap_div_data){
176 .shift = 16,
190 .data = &(struct clk_regmap_gate_data){
205 .data = &(struct clk_regmap_mux_data){
208 .shift = 10,
220 .data = &(struct clk_regmap_div_data){
222 .shift = 0,
236 .data = &(struct clk_regmap_gate_data){
251 .data = &(struct clk_regmap_mux_data){
254 .shift = 31,
268 .data = &(struct clk_regmap_gate_data){
283 .data = &(struct meson_clk_dualdiv_data){
286 .shift = 0,
291 .shift = 12,
296 .shift = 0,
301 .shift = 12,
306 .shift = 28,
322 .data = &(struct clk_regmap_mux_data) {
325 .shift = 24,
341 .data = &(struct clk_regmap_mux_data) {
344 .shift = 31,
359 .data = &(struct clk_regmap_gate_data){
375 .data = &(struct clk_regmap_gate_data){
390 .data = &(struct meson_clk_dualdiv_data){
393 .shift = 0,
398 .shift = 12,
403 .shift = 0,
408 .shift = 12,
413 .shift = 28,
429 .data = &(struct clk_regmap_mux_data) {
432 .shift = 24,
448 .data = &(struct clk_regmap_mux_data) {
451 .shift = 31,
466 .data = &(struct clk_regmap_gate_data){
489 .data = &(struct clk_regmap_mux_data){
492 .shift = 9,
504 .data = &(struct clk_regmap_div_data){
506 .shift = 0,
521 .data = &(struct clk_regmap_gate_data){
537 .data = &(struct clk_regmap_gate_data){
566 .data = &(struct clk_regmap_mux_data){
569 .shift = 10,
585 .data = &(struct meson_vid_pll_div_data){
588 .shift = 0,
593 .shift = 16,
612 .data = &(struct clk_regmap_mux_data){
615 .shift = 18,
630 .data = &(struct clk_regmap_gate_data){
657 .data = &(struct clk_regmap_mux_data){
660 .shift = 16,
672 .data = &(struct clk_regmap_mux_data){
675 .shift = 16,
687 .data = &(struct clk_regmap_gate_data){
701 .data = &(struct clk_regmap_gate_data){
715 .data = &(struct clk_regmap_div_data){
717 .shift = 0,
732 .data = &(struct clk_regmap_div_data){
734 .shift = 0,
749 .data = &(struct clk_regmap_gate_data){
763 .data = &(struct clk_regmap_gate_data){
777 .data = &(struct clk_regmap_gate_data){
791 .data = &(struct clk_regmap_gate_data){
805 .data = &(struct clk_regmap_gate_data){
819 .data = &(struct clk_regmap_gate_data){
833 .data = &(struct clk_regmap_gate_data){
847 .data = &(struct clk_regmap_gate_data){
861 .data = &(struct clk_regmap_gate_data){
875 .data = &(struct clk_regmap_gate_data){
889 .data = &(struct clk_regmap_gate_data){
903 .data = &(struct clk_regmap_gate_data){
1044 .data = &(struct clk_regmap_mux_data){
1047 .shift = 28,
1060 .data = &(struct clk_regmap_mux_data){
1063 .shift = 20,
1076 .data = &(struct clk_regmap_mux_data){
1079 .shift = 28,
1107 .data = &(struct clk_regmap_mux_data){
1110 .shift = 16,
1123 .data = &(struct clk_regmap_gate_data){
1139 .data = &(struct clk_regmap_gate_data){
1155 .data = &(struct clk_regmap_gate_data){
1171 .data = &(struct clk_regmap_gate_data){
1195 .data = &(struct clk_regmap_mux_data){
1198 .shift = 9,
1211 .data = &(struct clk_regmap_div_data){
1213 .shift = 0,
1226 .data = &(struct clk_regmap_gate_data){
1240 .data = &(struct clk_regmap_div_data){
1242 .shift = 0,
1257 .data = &(struct clk_regmap_gate_data){
1274 * muxed by a glitch-free switch. The CCF can manage this glitch-free
1275 * mux because it does top-to-bottom updates the each clock tree and
1290 .data = &(struct clk_regmap_mux_data){
1293 .shift = 9,
1311 .data = &(struct clk_regmap_div_data){
1313 .shift = 0,
1328 .data = &(struct clk_regmap_gate_data){
1344 .data = &(struct clk_regmap_mux_data){
1347 .shift = 25,
1359 .data = &(struct clk_regmap_div_data){
1361 .shift = 16,
1376 .data = &(struct clk_regmap_gate_data){
1397 .data = &(struct clk_regmap_mux_data){
1400 .shift = 31,
1424 .data = &(struct clk_regmap_mux_data){
1427 .shift = 9,
1440 .data = &(struct clk_regmap_div_data){
1442 .shift = 0,
1458 .data = &(struct clk_regmap_gate_data){
1474 .data = &(struct clk_regmap_mux_data){
1477 .shift = 9,
1490 .data = &(struct clk_regmap_div_data){
1492 .shift = 0,
1508 .data = &(struct clk_regmap_gate_data){
1529 .data = &(struct clk_regmap_mux_data){
1532 .shift = 15,
1544 .data = &(struct clk_regmap_mux_data){
1547 .shift = 9,
1560 .data = &(struct clk_regmap_div_data){
1562 .shift = 0,
1578 .data = &(struct clk_regmap_gate_data){
1594 .data = &(struct clk_regmap_mux_data){
1597 .shift = 9,
1610 .data = &(struct clk_regmap_div_data){
1612 .shift = 0,
1628 .data = &(struct clk_regmap_gate_data){
1649 .data = &(struct clk_regmap_mux_data){
1652 .shift = 15,
1676 .data = &(struct clk_regmap_mux_data){
1679 .shift = 9,
1691 .data = &(struct clk_regmap_div_data){
1693 .shift = 0,
1706 .data = &(struct clk_regmap_gate_data){
1720 .data = &(struct clk_regmap_mux_data){
1723 .shift = 25,
1735 .data = &(struct clk_regmap_div_data){
1737 .shift = 16,
1750 .data = &(struct clk_regmap_gate_data){
1764 .data = &(struct clk_regmap_mux_data){
1767 .shift = 31,
1789 .data = &(struct clk_regmap_mux_data){
1792 .shift = 20,
1804 .data = &(struct clk_regmap_div_data){
1806 .shift = 16,
1821 .data = &(struct clk_regmap_gate_data){
1837 .data = &(struct clk_regmap_div_data){
1839 .shift = 0,
1854 .data = &(struct clk_regmap_gate_data){
1881 .data = &(struct clk_regmap_mux_data){
1884 .shift = 9,
1896 .data = &(struct clk_regmap_div_data){
1898 .shift = 0,
1913 .data = &(struct clk_regmap_gate_data){
1929 .data = &(struct clk_regmap_mux_data){
1932 .shift = 25,
1944 .data = &(struct clk_regmap_div_data){
1946 .shift = 16,
1961 .data = &(struct clk_regmap_gate_data){
1982 .data = &(struct clk_regmap_mux_data){
1985 .shift = 31,
2009 .data = &(struct clk_regmap_mux_data){
2012 .shift = 9,
2024 .data = &(struct clk_regmap_div_data){
2026 .shift = 0,
2041 .data = &(struct clk_regmap_gate_data){
2057 .data = &(struct clk_regmap_mux_data){
2060 .shift = 25,
2072 .data = &(struct clk_regmap_div_data){
2074 .shift = 16,
2089 .data = &(struct clk_regmap_gate_data){
2105 .data = &(struct clk_regmap_mux_data){
2108 .shift = 31,
2123 .data = &(struct clk_regmap_gate_data){
2144 .data = &(struct clk_regmap_mux_data){
2147 .shift = 9,
2159 .data = &(struct clk_regmap_div_data){
2161 .shift = 0,
2176 .data = &(struct clk_regmap_gate_data){
2199 .data = &(struct clk_regmap_mux_data){
2202 .shift = 25,
2214 .data = &(struct clk_regmap_div_data){
2216 .shift = 16,
2231 .data = &(struct clk_regmap_gate_data){
2255 .data = &(struct clk_regmap_mux_data){
2258 .shift = 9,
2270 .data = &(struct clk_regmap_div_data){
2272 .shift = 0,
2287 .data = &(struct clk_regmap_gate_data){
2315 .data = &(struct clk_regmap_mux_data){
2318 .shift = 9,
2330 .data = &(struct clk_regmap_div_data){
2332 .shift = 0,
2347 .data = &(struct clk_regmap_gate_data){
2363 .data = &(struct clk_regmap_mux_data){
2366 .shift = 9,
2378 .data = &(struct clk_regmap_div_data){
2380 .shift = 0,
2395 .data = &(struct clk_regmap_gate_data){
2411 .data = &(struct clk_regmap_mux_data){
2414 .shift = 25,
2426 .data = &(struct clk_regmap_div_data){
2428 .shift = 16,
2443 .data = &(struct clk_regmap_gate_data){
2470 .data = &(struct clk_regmap_mux_data){
2473 .shift = 7,
2485 .data = &(struct clk_regmap_div_data){
2487 .shift = 0,
2502 .data = &(struct clk_regmap_gate_data){
2526 .data = &(struct clk_regmap_mux_data) {
2529 .shift = 9,
2541 .data = &(struct clk_regmap_div_data) {
2543 .shift = 0,
2558 .data = &(struct clk_regmap_gate_data) {
2574 .data = &(struct clk_regmap_mux_data) {
2577 .shift = 25,
2589 .data = &(struct clk_regmap_div_data) {
2591 .shift = 16,
2606 .data = &(struct clk_regmap_gate_data) {
2622 .data = &(struct clk_regmap_mux_data) {
2625 .shift = 9,
2637 .data = &(struct clk_regmap_div_data) {
2639 .shift = 0,
2653 .data = &(struct clk_regmap_gate_data) {
2669 .data = &(struct clk_regmap_mux_data) {
2672 .shift = 25,
2684 .data = &(struct clk_regmap_div_data) {
2686 .shift = 16,
2701 .data = &(struct clk_regmap_gate_data) {
2717 .data = &(struct clk_regmap_mux_data) {
2720 .shift = 9,
2732 .data = &(struct clk_regmap_div_data) {
2734 .shift = 0,
2749 .data = &(struct clk_regmap_gate_data) {
2765 .data = &(struct clk_regmap_mux_data) {
2768 .shift = 25,
2780 .data = &(struct clk_regmap_div_data) {
2782 .shift = 16,
2797 .data = &(struct clk_regmap_gate_data) {
2813 .data = &(struct clk_regmap_mux_data) {
2816 .shift = 9,
2828 .data = &(struct clk_regmap_div_data) {
2830 .shift = 0,
2845 .data = &(struct clk_regmap_gate_data) {
2861 .data = &(struct clk_regmap_mux_data) {
2864 .shift = 25,
2876 .data = &(struct clk_regmap_div_data) {
2878 .shift = 16,
2893 .data = &(struct clk_regmap_gate_data) {
2909 .data = &(struct clk_regmap_mux_data) {
2912 .shift = 9,
2924 .data = &(struct clk_regmap_div_data) {
2926 .shift = 0,
2941 .data = &(struct clk_regmap_gate_data) {
2957 .data = &(struct clk_regmap_mux_data) {
2960 .shift = 25,
2972 .data = &(struct clk_regmap_div_data) {
2974 .shift = 16,
2989 .data = &(struct clk_regmap_gate_data) {
3005 .data = &(struct clk_regmap_mux_data) {
3008 .shift = 9,
3023 .data = &(struct clk_regmap_div_data) {
3025 .shift = 0,
3040 .data = &(struct clk_regmap_gate_data) {
3079 .data = &(struct clk_regmap_mux_data){
3082 .shift = 12,
3100 .data = &(struct clk_regmap_div_data){
3102 .shift = 0,
3117 .data = &(struct clk_regmap_gate_data){
3144 .data = &(struct clk_regmap_mux_data) {
3147 .shift = 25,
3159 .data = &(struct clk_regmap_div_data) {
3161 .shift = 16,
3176 .data = &(struct clk_regmap_gate_data) {
3192 .data = &(struct clk_regmap_mux_data) {
3195 .shift = 9,
3212 .data = &(struct clk_regmap_div_data) {
3214 .shift = 0,
3229 .data = &(struct clk_regmap_gate_data) {
3764 struct device *dev = &pdev->dev; in meson_s4_periphs_probe()
3781 s4_periphs_clk_regmaps[i]->map = regmap; in meson_s4_periphs_probe()
3799 .compatible = "amlogic,s4-peripherals-clkc",
3808 .name = "s4-periphs-clkc",